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H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,”10.1145/3053687__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, p. 24:1-24:23, 2017, doi:10.1145/3053687 .

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G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,”10.1016/j.compeleceng.2016.04.021__Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi:10.1016/j.compeleceng.2016.04.021 .

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M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,”10.7873/DATE.2015.1124__in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi:10.7873/DATE.2015.1124 .

H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,”10.1109/FCCM.2014.67__in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi:10.1109/FCCM.2014.67 .

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H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University, 2013.

H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,”10.1109/FPT.2013.6718394__in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi:10.1109/FPT.2013.6718394 .