The Pseudo-Exhaustive Test of Sequential Circuits
H.-J. Wunderlich, S. Hellebrand, in: IEEE International Test Conference (ITC’89), IEEE, Washington, DC, USA, 1989, pp. 19–27.
LibreCat: /record/13020
DOI: 10.1109/test.1989.82273

Generating Pattern Sequences for the Pseudo-Exhaustive Test of MOS-Circuits
H.-J. Wunderlich, S. Hellebrand, in: 18th International Symposium on Fault-Tolerant Computing, FTCS-18, Tokyo, Japan, 1988, pp. 36–45.
LibreCat: /record/13021
DOI: 10.1109/ftcs.1988.5294

Integrated Tools for Automatic Design for Testability
D. Schmid, H.-J. Wunderlich, F. Feldbusch, S. Hellebrand, J. Holzinger, A. Kunzmann, in: Tool Integration and Design Environments, F.J. Rammig (Editor), Amsterdam: Elsevier Science Publishers B.V.(North Holland), IFIP, Amsterdam, The Netherlands, 1988, pp. 233–258.
LibreCat: /record/13058

Automatisierung des Entwurfs vollständig testbarer Schaltungen
S. Hellebrand, H.-J. Wunderlich, in: GI - 18. Jahrestagung II, Hamburg, 1988, Informatik-Fachberichte 188, Springer Verlag, Hamburg, Germany, 1988, pp. 145–159.
LibreCat: /record/13062