H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, and H.-J. Wunderlich, “Time and Space Optimized Storage-based BIST under Multiple Voltages and Variations,” in European Test Symposium, The Hague, Netherlands, May 20-24, 2024, The Hague, NL, p. 6.
LibreCat: /record/52744

H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, and H.-J. Wunderlich, “Vmin Testing under Variations: Defect vs. Fault Coverage,” in IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, Maceió, p. 6.
LibreCat: /record/52742

S. Hellebrand, S. Sadeghi-Kohan, and H.-J. Wunderlich, “Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle,” in International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, Xi’an, China, p. 1.
LibreCat: /record/52743

H.-J. Wunderlich, H. Jafarzadeh, and S. Hellebrand, “Robust Test of Small Delay Faults under  PVT-Variations,” in International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, Xi’an, China, p. 1.
LibreCat: /record/52745

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication,”10.1109/dsn-w58399.2023.00056__2023, doi:10.1109/dsn-w58399.2023.00056 .
LibreCat: /record/46739
DOI: 10.1109/dsn-w58399.2023.00056

S. Sadeghi-Kohan, J. D. Reimer, S. Hellebrand, and H.-J. Wunderlich, “Optimizing the Streaming of Sensor Data with Approximate Communication,” presented at the IEEE Asian Test Symposium (ATS’23), 2023.
LibreCat: /record/46738

H. Jafarzadeh et al., “Robust Pattern Generation for Small Delay Faults under Process Variations,” presented at the IEEE International Test Conference (ITC’23), Anaheim, USA, 2023.
LibreCat: /record/45830

A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” 2020.
LibreCat: /record/19422

S. Sadeghi-Kohan and S. Hellebrand, “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects,”10.1109/vts48691.2020.9107591__2020, doi:10.1109/vts48691.2020.9107591 .
LibreCat: /record/29200
DOI: 10.1109/vts48691.2020.9107591

S. Holst et al., “Logic Fault Diagnosis of Hidden Delay Defects,” 2020.
LibreCat: /record/19421

M. U. Maaz, A. Sprenger, and S. Hellebrand, “A Hybrid Space Compactor for Adaptive X-Handling,” in 50th IEEE International Test Conference (ITC), Washington, DC, USA, 2019, pp. 1–8.
LibreCat: /record/12918

R. Rezaeizadeh Rookerd, S. Sadeghi-Kohan, and Z. Navabi, “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture,”10.1145/3194554.3194599__2018, doi:10.1145/3194554.3194599 .
LibreCat: /record/29460
DOI: 10.1145/3194554.3194599

A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,”10.1109/ddecs.2018.00020__2018, doi:10.1109/ddecs.2018.00020 .
LibreCat: /record/4575
DOI: 10.1109/ddecs.2018.00020

C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, and H.-J. Wunderlich, “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention,”10.1109/ats.2018.00028__2018, doi:10.1109/ats.2018.00028 .
LibreCat: /record/10575
DOI: 10.1109/ats.2018.00028

S. Sadeghi-Kohan, A. Vafaei, and Z. Navabi, “Near-Optimal Node Selection Procedure for Aging Monitor Placement,”10.1109/iolts.2018.8474120__2018, doi:10.1109/iolts.2018.8474120 .
LibreCat: /record/29459
DOI: 10.1109/iolts.2018.8474120

J. Deshmukh, W. Kunz, H.-J. Wunderlich, and S. Hellebrand, “Special Session on Early Life Failures,” in 35th IEEE VLSI Test Symposium (VTS’17), 2017.
LibreCat: /record/12973
DOI: 10.1109/vts.2017.7928933

M. Kampmann and S. Hellebrand, “Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test,”10.1109/ddecs.2017.7934564__2017, doi:10.1109/ddecs.2017.7934564 .
LibreCat: /record/10576
DOI: 10.1109/ddecs.2017.7934564

M. Jenihhin, A. Kamkin, Z. Navabi, and S. Sadeghi-Kohan, “Universal mitigation of NBTI-induced aging by design randomization,”10.1109/ewdts.2016.7807635__2017, doi:10.1109/ewdts.2016.7807635 .
LibreCat: /record/29463
DOI: 10.1109/ewdts.2016.7807635

M. Kampmann and S. Hellebrand, “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test,” in 25th IEEE Asian Test Symposium (ATS’16), 2016, pp. 1–6.
LibreCat: /record/12975
DOI: 10.1109/ats.2016.20

M. Kampmann, M. A. Kochte, E. Schneider, T. Indlekofer, S. Hellebrand, and H.-J. Wunderlich, “Optimized Selection of Frequencies for Faster-Than-at-Speed Test,” in 24th IEEE Asian Test Symposium (ATS’15), 2015, pp. 109–114.
LibreCat: /record/12976
DOI: 10.1109/ats.2015.26