A Hybrid Space Compactor for Adaptive X-Handling
M.U. Maaz, A. Sprenger, S. Hellebrand, in: 50th IEEE International Test Conference (ITC), IEEE, Washington, DC, USA, 2019, pp. 1–8.

Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture
R. Rezaeizadeh Rookerd, S. Sadeghi-Kohan, Z. Navabi, in: Proceedings of the 2018 on Great Lakes Symposium on VLSI, ACM, 2018.

Tuning Stochastic Space Compaction to Faster-than-at-Speed Test
A. Sprenger, S. Hellebrand, in: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &; Systems (DDECS), IEEE, Budapest, Hungary, 2018.

Extending Aging Monitors for Early Life and Wear-Out Failure Prevention
C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, H.-J. Wunderlich, in: 27th IEEE Asian Test Symposium (ATS’18), 2018.

Near-Optimal Node Selection Procedure for Aging Monitor Placement
S. Sadeghi-Kohan, A. Vafaei, Z. Navabi, in: 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), IEEE, 2018.

Special Session on Early Life Failures
J. Deshmukh, W. Kunz, H.-J. Wunderlich, S. Hellebrand, in: 35th IEEE VLSI Test Symposium (VTS’17), IEEE, Caesars Palace, Las Vegas, Nevada, USA, 2017.

Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test
M. Kampmann, S. Hellebrand, in: 20th IEEE International Symposium on Design &; Diagnostics of Electronic Circuits &; Systems (DDECS’17), IEEE, 2017.

Universal mitigation of NBTI-induced aging by design randomization
M. Jenihhin, A. Kamkin, Z. Navabi, S. Sadeghi-Kohan, in: 2016 IEEE East-West Design &; Test Symposium (EWDTS), IEEE, 2017.

X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test
M. Kampmann, S. Hellebrand, in: 25th IEEE Asian Test Symposium (ATS’16), IEEE, Hiroshima, Japan, 2016, pp. 1–6.

Optimized Selection of Frequencies for Faster-Than-at-Speed Test
M. Kampmann, M. A. Kochte, E. Schneider, T. Indlekofer, S. Hellebrand, H.-J. Wunderlich, in: 24th IEEE Asian Test Symposium (ATS’15), IEEE, Mumbai, India, 2015, pp. 109–114.

Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation
S. Sadeghi-Kohan, A. Kamran, F. Forooghifar, Z. Navabi, in: 2015 10th International Conference on Design &; Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015.

Online self adjusting progressive age monitoring of timing variations
S. Sadeghi-Kohan, M. Kamal, J. McNeil, P. Prinetto, Z. Navabi, in: 2015 10th International Conference on Design &; Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015.

FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects
S. Hellebrand, T. Indlekofer, M. Kampmann, M. A. Kochte, C. Liu, H.-J. Wunderlich, in: IEEE International Test Conference (ITC’14), IEEE, Seattle, Washington, USA, 2014.

An off-line MDSI interconnect BIST incorporated in BS 1149.1
M. Mohammadi, S. Sadeghi-Kohan, N. Masoumi, Z. Navabi, in: 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014.

Improving polynomial datapath debugging with HEDs
S. Sadeghi-Kohan, P. Behnam, B. Alizadeh, M. Fujita, Z. Navabi, in: 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014.

Analyzing and Quantifying Fault Tolerance Properties
S. Hellebrand, in: 14th IEEE Latin American Test Workshop - (LATW’13), IEEE, Cordoba, Argentina, 2013.

BS 1149.1 extensions for an online interconnect fault detection and recovery
S. Sadeghi-Kohan, M. Namaki-Shoushtari, F. Javaheri, Z. Navabi, in: 2012 IEEE International Test Conference, IEEE, 2013.

A new structure for interconnect offline testing
S. Sadeghi-Kohan, S. Keshavarz, F. Zokaee, F. Farahmandi, Z. Navabi, in: East-West Design &;amp; Test Symposium (EWDTS 2013), IEEE, 2013.

Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test
A. Cook, S. Hellebrand, M. E. Imhof, A. Mumtaz, H.-J. Wunderlich, in: 13th IEEE Latin American Test Workshop (LATW’12), IEEE, Quito, Ecuador, 2012, pp. 1–4.

Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test
A. Cook, S. Hellebrand, H.-J. Wunderlich, in: 17th IEEE European Test Symposium (ETS’12), IEEE, Annecy, France, 2012, pp. 1–6.