Richters D, Lass M, Walther A, Plessl C, Kühne T. A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics. 2019;25(2):564-585. doi:10.4208/cicp.OA-2018-0053
LibreCat: /record/21
DOI: 10.4208/cicp.OA-2018-0053
arXiv: 1703.02456

Platzner M, Plessl C. FPGAs im Rechenzentrum. Informatik Spektrum. Published online 2019. doi:10.1007/s00287-019-01187-w
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Mertens JC, Boschmann A, Schmidt M, Plessl C. Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering. 2018;21(4):441-451. doi:10.1007/s12283-018-0291-0
LibreCat: /record/6516
DOI: 10.1007/s12283-018-0291-0

Kenter T, Mahale G, Alhaddad S, et al. OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE; 2018. doi:10.1109/FCCM.2018.00037
LibreCat: /record/1588
DOI: 10.1109/FCCM.2018.00037

Lass M, Mohr S, Wiebeler H, Kühne T, Plessl C. A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. In: Proc. Platform for Advanced Scientific Computing (PASC) Conference. ACM; 2018. doi:10.1145/3218176.3218231
LibreCat: /record/1590
DOI: 10.1145/3218176.3218231
arXiv: 1710.10899

Riebler H, Vaz GF, Kenter T, Plessl C. Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. In: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). ACM; 2018. doi:10.1145/3178487.3178534
LibreCat: /record/1204
DOI: 10.1145/3178487.3178534

Riebler H, Lass M, Mittendorf R, Löcke T, Plessl C. Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS). 2017;10(3):24:1-24:23. doi:10.1145/3053687
LibreCat: /record/18
DOI: 10.1145/3053687

Kenter T, Förstner J, Plessl C. Flexible FPGA design for FDTD using OpenCL. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2017. doi:10.23919/FPL.2017.8056844
LibreCat: /record/1592
DOI: 10.23919/FPL.2017.8056844

Schumacher J, Plessl C, Vandelli W. High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series. 2017;898. doi:10.1088/1742-6596/898/8/082003
LibreCat: /record/1589
DOI: 10.1088/1742-6596/898/8/082003

Agne A, Platzner M, Plessl C, Happe M, Lübbers E. ReconOS. In: Koch D, Hannig F, Ziener D, eds. FPGAs for Software Programmers. Springer International Publishing; 2016:227-244. doi:10.1007/978-3-319-26408-0_13
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Riebler H, Vaz GF, Plessl C, Trainiti EMG, Durelli GC, Bolchini C. Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC). ; 2016.
LibreCat: /record/31

Kenter T, Plessl C. Microdisk Cavity FDTD Simulation on FPGA using OpenCL. In: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC). ; 2016.
LibreCat: /record/24

Lass M, Kühne T, Plessl C. Using Approximate Computing in Scientific Codes. In: Workshop on Approximate Computing (AC). ; 2016.
LibreCat: /record/25

Riebler H, Vaz GF, Plessl C, et al. Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI). IEEE; 2016:1-5. doi:10.1109/RTSI.2016.7740545
LibreCat: /record/138
DOI: 10.1109/RTSI.2016.7740545

Agne A, Happe M, Lösch A, Plessl C, Platzner M. Self-aware Compute Nodes. In: Self-Aware Computing Systems. Natural Computing Series (NCS). Springer International Publishing; 2016:145-165. doi:10.1007/978-3-319-39675-0_8
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Vaz GF, Riebler H, Kenter T, Plessl C. Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering. 2016;55:91-111. doi:10.1016/j.compeleceng.2016.04.021
LibreCat: /record/165
DOI: 10.1016/j.compeleceng.2016.04.021

Lösch A, Beisel T, Kenter T, Plessl C, Platzner M. Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE). EDA Consortium / IEEE; 2016:912-917.
LibreCat: /record/168

Kenter T, Vaz GF, Riebler H, Plessl C. Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). In: Workshop on Reconfigurable Computing (WRC). ; 2016.
LibreCat: /record/171

Kenter T, Schmitz H, Plessl C. Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC). 2015;2015. doi:10.1155/2015/859425
LibreCat: /record/296
DOI: 10.1155/2015/859425

Damschen M, Plessl C. Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. In: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT). ; 2015.
LibreCat: /record/303
arXiv: 1412.3906