Richters, D., Lass, M., Walther, A., Plessl, C., &; Kühne, T. (2019). A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics, 25(2), 564–585.https://doi.org/10.4208/cicp.OA-2018-0053 

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 

Mertens, J. C., Boschmann, A., Schmidt, M., &; Plessl, C. (2018). Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering, 21(4), 441–451.https://doi.org/10.1007/s12283-018-0291-0 

Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A., Hannig, F., Förstner, J., &; Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM).https://doi.org/10.1109/FCCM.2018.00037 

Lass, M., Mohr, S., Wiebeler, H., Kühne, T., &; Plessl, C. (2018). A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. Proc. Platform for Advanced Scientific Computing (PASC) Conference. Platform for Advanced Scientific Computing Conference (PASC), Basel, Switzerland.https://doi.org/10.1145/3218176.3218231 

Riebler, H., Vaz, G. F., Kenter, T., &; Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP).https://doi.org/10.1145/3178487.3178534 

Riebler, H., Lass, M., Mittendorf, R., Löcke, T., &; Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23.https://doi.org/10.1145/3053687 

Kenter, T., Förstner, J., &; Plessl, C. (2017). Flexible FPGA design for FDTD using OpenCL. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL).https://doi.org/10.23919/FPL.2017.8056844 

Schumacher, J., Plessl, C., &; Vandelli, W. (2017). High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series, 898, Article 082003.https://doi.org/10.1088/1742-6596/898/8/082003 

Agne, A., Platzner, M., Plessl, C., Happe, M., &; Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, &; D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Springer International Publishing.https://doi.org/10.1007/978-3-319-26408-0_13 

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).

Kenter, T., &; Plessl, C. (2016). Microdisk Cavity FDTD Simulation on FPGA using OpenCL. Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC).

Lass, M., Kühne, T., &; Plessl, C. (2016). Using Approximate Computing in Scientific Codes. Workshop on Approximate Computing (AC).

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., Santambrogio, M. D., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 1–5.https://doi.org/10.1109/RTSI.2016.7740545 

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111.https://doi.org/10.1016/j.compeleceng.2016.04.021 

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.

Kenter, T., Vaz, G. F., Riebler, H., &; Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 

Damschen, M., &; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).