Plessl, C., &; Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui &; H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global.https://doi.org/10.4018/978-1-60960-086-0 
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Sekanina, L., Walker, J. A., Kaufmann, P., Plessl, C., &; Platzner, M. (2011). Evolution of Electronic Circuits. In Cartesian Genetic Programming (pp. 125–179). Springer Berlin Heidelberg.
LibreCat: /record/10737

Meyer, B., Plessl, C., &; Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63.https://doi.org/10.1109/SAAHPC.2011.12 
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226.https://doi.org/10.1109/ASAP.2011.6043273 
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Happe, M., Agne, A., &; Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60.https://doi.org/10.1109/ReConFig.2011.59 
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Kenter, T., Platzner, M., Plessl, C., &; Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180.https://doi.org/10.1145/1950413.1950448 
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Schumacher, T., Süß, T., Plessl, C., &; Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC).https://doi.org/10.1155/2011/760954 
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Grad, M., &; Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285.https://doi.org/10.1109/IPDPS.2011.153 
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Lübbers, E., Platzner, M., Plessl, C., Keller, A., &; Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.
LibreCat: /record/2223

Grad, M., &; Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72.https://doi.org/10.1109/ReConFig.2010.19 
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

Grad, M., &; Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.
LibreCat: /record/2224

Andrews, D., &; Plessl, C. (2010). Configurable Processor Architectures: History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165.
LibreCat: /record/2220

Plaks, T. P., Andrews, D., DeMara, R., Lam, H., Lee, J., Plessl, C., &; Stitt, G. (Eds.). (2010). Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
LibreCat: /record/2222

Beisel, T., Niekamp, M., &; Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72.https://doi.org/10.1109/ASAP.2010.5540798 
LibreCat: /record/2226
DOI: 10.1109/ASAP.2010.5540798

Keller, A., Plattner, B., Lübbers, E., Platzner, M., &; Plessl, C. (2010). Reconfigurable Nodes for Future Networks. Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–376.https://doi.org/10.1109/GLOCOMW.2010.5700341 
LibreCat: /record/2206
DOI: 10.1109/GLOCOMW.2010.5700341

Woehrle, M., Plessl, C., &; Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. Proc. Int. Conf. Networked Sensing Systems (INSS), 245–248.https://doi.org/10.1109/INSS.2010.5572211 
LibreCat: /record/2227
DOI: 10.1109/INSS.2010.5572211

Kenter, T., Platzner, M., Plessl, C., &; Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami &; S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA).
LibreCat: /record/2228

Woehrle, M., Plessl, C., &; Thiele, L. (2009). Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich.
LibreCat: /record/2353

Schumacher, T., Plessl, C., &; Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–278.https://doi.org/10.1109/FCCM.2009.25 
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

Kaufmann, P., Plessl, C., &; Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18.
LibreCat: /record/2262