Olgu K, Kenter T, Nunez-Yanez J, Mcintosh-Smith S. Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures. In: Proceedings of the 12th International Workshop on OpenCL and SYCL. ACM; 2024. doi:10.1145/3648115.3648134

Büttner M, Alt C, Kenter T, Köstler H, Plessl C, Aizinger V. Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL. In: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC). ACM; 2024. doi:10.1145/3659914.3659925

Wu X, Kenter T, Schade R, Kühne T, Plessl C. Computing and Compressing Electron Repulsion Integrals on FPGAs. In: 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). ; 2023:162-173. doi:10.1109/FCCM57271.2023.00026

Van Hirtum L, De Causmaecker P, Goemaere J, et al. A computation of D(9) using FPGA Supercomputing. arXiv:230403039. Published online 2023.

Faj J, Kenter T, Faghih-Naini S, Plessl C, Aizinger V. Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes. In: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC). ACM; 2023. doi:10.1145/3592979.3593407

Prouveur C, Haefele M, Kenter T, Voss N. FPGA Acceleration for HPC Supercapacitor Simulations. In: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC). ACM; 2023. doi:10.1145/3592979.3593419

Opdenhövel J-O, Plessl C, Kenter T. Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation. In: Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART). ACM; 2023. doi:10.1145/3597031.3597050

Gavini V, Baroni S, Blum V, et al. Roadmap on Electronic Structure Codes in the Exascale Era. arXiv:220912747. Published online 2022.

Karp M, Podobas A, Kenter T, et al. A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges. In: International Conference on High Performance Computing in Asia-Pacific Region. ACM; 2022. doi:10.1145/3492805.3492808

Kühne T, Plessl C, Schade R, Schütt O. CK on the road to exascale. arXiv:220514741. Published online 2022.

Karp M, Podobas A, Jansson N, et al. High-Performance Spectral Element Methods on Field-Programmable Gate Arraysf: Implementation, Evaluation, and Future Projection. In: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE; 2021. doi:10.1109/ipdps49936.2021.00116

Karp M, Podobas A, Jansson N, et al. High-Performance Spectral Element Methods on Field-Programmable Gate Arraysf: Implementation, Evaluation, and Future Projection. In: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE; 2021. doi:10.1109/ipdps49936.2021.00116

Kenter T, Shambhu A, Faghih-Naini S, Aizinger V. Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA. In: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC). ACM; 2021. doi:10.1145/3468267.3470617

Lass M, Schade R, Kühne T, Plessl C. A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CK. In: Proc. International Conference for High Performance Computing, Networking, Storage and Analysis (SC). IEEE Computer Society; 2020:1127-1140. doi:10.1109/SC41405.2020.00084

Meyer M, Kenter T, Plessl C. Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite. In: 2020 IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC). ; 2020. doi:10.1109/h2rc51942.2020.00007

Gorlani P, Kenter T, Plessl C. OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE; 2019. doi:10.1109/ICFPT47387.2019.00020

Kenter T, Mahale G, Alhaddad S, et al. OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE; 2018. doi:10.1109/FCCM.2018.00037

Lass M, Mohr S, Wiebeler H, Kühne T, Plessl C. A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. In: Proc. Platform for Advanced Scientific Computing (PASC) Conference. ACM; 2018. doi:10.1145/3218176.3218231

Riebler H, Vaz GF, Kenter T, Plessl C. Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. In: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). ACM; 2018. doi:10.1145/3178487.3178534

Kenter T, Förstner J, Plessl C. Flexible FPGA design for FDTD using OpenCL. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2017. doi:10.23919/FPL.2017.8056844