Awais, Muhammad, et al. “DeepApprox: Rapid Deep Learning Based Design Space Exploration of Approximate Circuits via Check-Pointing.” To Apear in IEEE ISVLSI 2024, 2024.
LibreCat: /record/54468

Ahmed, Qazi Arbab, et al. “MAAS: Hiding Trojans in Approximate Circuits.” The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.
LibreCat: /record/44194

Lienen, Christian, et al. “AutonomROS: A ReconROS-Based Autonomous Driving Unit.”10.1109/irc59093.2023.00056__2023 Seventh IEEE International Conference on Robotic Computing (IRC), IEEE, 2023, doi:10.1109/irc59093.2023.00056.
LibreCat: /record/53794
DOI: 10.1109/irc59093.2023.00056

Clausing, Lennart, et al. “On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks under ReconO.”https://doi.org/10.1007/978-3-031-42921-7_17__Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC), 2023, doi:https://doi.org/10.1007/978-3-031-42921-7_17.
LibreCat: /record/45913
DOI: https://doi.org/10.1007/978-3-031-42921-7_17

Lienen, Christian, et al. “Mapping and Optimizing Communication in ROS 2-Based Applications on Configurable System-on-Chip Platforms.”https://doi.org/10.1145/3637843.3637846__Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI), doi:https://doi.org/10.1145/3637843.3637846.
LibreCat: /record/46229
DOI: https://doi.org/10.1145/3637843.3637846

Lienen, Christian, et al. “FpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications.”10.1109/IROS55552.2023.10341921__10.1109/IROS55552.2023.10341921__Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2023, doi:10.1109/IROS55552.2023.10341921.
LibreCat: /record/43048
DOI: 10.1109/IROS55552.2023.10341921

Jentzsch, Felix. “Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML.”10.1109/fpl60245.2023.00066__2023 33rd International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2023, doi:10.1109/fpl60245.2023.00066.
LibreCat: /record/53435
DOI: 10.1109/fpl60245.2023.00066

Witschen, Linus Matthias, et al. “Search Space Characterization for Approximate Logic Synthesis .” 2022 59th ACM/IEEE Design Automation Conference (DAC).
LibreCat: /record/29945

Witschen, Linus Matthias, et al. “MUSCAT: MUS-Based Circuit Approximation Technique.” Design, Automation and Test in Europe (DATE).
LibreCat: /record/29865

Hansmeier, Tim, and Marco Platzner. “Integrating Safety Guarantees into the Learning Classifier System XCS.”10.1007/978-3-031-02462-7_25__Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, vol. 13224, Springer International Publishing, 2022, pp. 386–401, doi:10.1007/978-3-031-02462-7_25.
LibreCat: /record/30971
DOI: 10.1007/978-3-031-02462-7_25

Clausing, Lennart, and Marco Platzner. “ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support.”10.1109/ipdpsw55747.2022.00029__2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–27, doi:10.1109/ipdpsw55747.2022.00029.
LibreCat: /record/32855
DOI: 10.1109/ipdpsw55747.2022.00029

Hansmeier, Tim, et al. “XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion.”10.1145/3520304.3533977__GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), 2022, pp. 2071–79, doi:10.1145/3520304.3533977.
LibreCat: /record/33253
DOI: 10.1145/3520304.3533977

Lienen, Christian, and Marco Platzner. ReconROS Executor: Event-Driven Programming of FPGA-Accelerated ROS 2 Applications. 2022.
LibreCat: /record/29541

Lienen, Christian, and Marco Platzner. Task Mapping for Hardware-Accelerated Robotics Applications Using ReconROS.
LibreCat: /record/34007

Lienen, Christian, and Marco Platzner. “Event-Driven Programming of FPGA-Accelerated ROS 2 Robotics Applications.”10.1109/DSD57027.2022.00088__2022 25th Euromicro Conference on Digital System Design (DSD), doi:10.1109/DSD57027.2022.00088.
LibreCat: /record/34005
DOI: 10.1109/DSD57027.2022.00088

Ahmed, Qazi Arbab, and Marco Platzner. On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), 2022.
LibreCat: /record/32342

Awais, Muhammad, et al. “LDAX: A Learning-Based Fast Design Space Exploration Framework for Approximate Circuit Synthesis.”https://doi.org/10.1145/3453688.3461506__Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32, doi:https://doi.org/10.1145/3453688.3461506.
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

Awais, Muhammad, and Marco Platzner. “MCTS-Based Synthesis Towards Efficient Approximate Accelerators.” Proceedings of IEEE Computer Society Annual Symposium on VLSI, IEEE, 2021, pp. 384–89.
LibreCat: /record/22309

Witschen, Linus Matthias, et al. “Timing Optimization for Virtual FPGA Configurations.”10.1007/978-3-030-79025-7_4__Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), edited by Frank Hannig et al., Springer Lecture Notes in Computer Science, doi:10.1007/978-3-030-79025-7_4.
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Hansmeier, Tim. “Self-Aware Operation of Heterogeneous Compute Nodes Using the Learning Classifier System XCS.”10.1145/3468044.3468055__HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Association for Computing Machinery (ACM), 2021, doi:10.1145/3468044.3468055.
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055