Clausing, L., &; Platzner, M. (2022). ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 120–127.https://doi.org/10.1109/ipdpsw55747.2022.00029 
LibreCat: /record/32855
DOI: 10.1109/ipdpsw55747.2022.00029

Hansmeier, T., Brede, M., &; Platzner, M. (2022). XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2071–2079.https://doi.org/10.1145/3520304.3533977 
LibreCat: /record/33253
DOI: 10.1145/3520304.3533977

Lienen, C., &; Platzner, M. (2022). ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.
LibreCat: /record/29541

Lienen, C., &; Platzner, M. (n.d.). Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.
LibreCat: /record/34007

Lienen, C., &; Platzner, M. (n.d.). Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. 2022 25th Euromicro Conference on Digital System Design (DSD). 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain.https://doi.org/10.1109/DSD57027.2022.00088 
LibreCat: /record/34005
DOI: 10.1109/DSD57027.2022.00088

Ahmed, Q. A., &; Platzner, M. (2022). On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.
LibreCat: /record/32342

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM.https://doi.org/10.1145/3453688.3461506 
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

Awais, M., &; Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.
LibreCat: /record/22309

Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., &; Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, &; D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science.https://doi.org/10.1007/978-3-030-79025-7_4 
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online.https://doi.org/10.1145/3468044.3468055 
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055

Lienen, C., &; Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. In arXiv:2107.07208.
LibreCat: /record/22764

Hansmeier, T., &; Platzner, M. (2021). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1639–1647.https://doi.org/10.1145/3449726.3463159 
LibreCat: /record/21813
DOI: 10.1145/3449726.3463159

Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC).https://doi.org/10.1109/vlsi-soc53125.2021.9606974 
LibreCat: /record/29138
DOI: 10.1109/vlsi-soc53125.2021.9606974

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE). Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France.https://doi.org/10.23919/DATE51398.2021.9474026 
LibreCat: /record/20681
DOI: 10.23919/DATE51398.2021.9474026

Clausing, L. (2021). ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies.https://doi.org/10.1145/3468044.3468056 
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., &; Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases.https://doi.org/10.1007/978-3-030-93736-2_27 
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27

Guetttatfi, Z., Kaufmann, P., &; Platzner, M. (2020). Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC).
LibreCat: /record/3583

Gatica, C. P., &; Platzner, M. (2020). Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg.https://doi.org/10.1007/978-3-662-59084-3_9 
LibreCat: /record/21584
DOI: 10.1007/978-3-662-59084-3_9

Witschen, L. M., Wiersema, T., &; Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).
LibreCat: /record/20748

Lienen, C., Platzner, M., &; Rinner, B. (2020). ReconROS: Flexible Hardware Acceleration for RO Applications. In Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT).
LibreCat: /record/20750