FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm
S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–140.
LibreCat: /record/2097
DOI: 10.1109/FPT.2012.6412125

FPGA implementation of a second-order convolutive blind signal separation algorithm
S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG), 2012.
LibreCat: /record/2100

Comparison of Bayesian Move Prediction Systems for Computer Go
M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.
LibreCat: /record/2103
DOI: 10.1109/CIG.2012.6374143

Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array
A. Boschmann, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat: /record/10636

Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Pragma based parallelization - Trading hardware efficiency for ease of use?
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Hardware/Software Platform for Self-aware Compute Nodes
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat: /record/609

Turning control flow graphs into function calls: Code generation for heterogeneous architectures
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat: /record/2180

Estimation and Partitioning for CPU-Accelerator Architectures
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
LibreCat: /record/2191

Parallel Monte-Carlo Tree Search for HPC Systems
T. Graf, U. Lorenz, M. Platzner, L. Schaefers, in: Proc. European Conf. on Parallel Processing (Euro-Par), Springer, Berlin / Heidelberg, 2011.
LibreCat: /record/2204
DOI: 10.1007/978-3-642-23397-5_36

Achieving Hardware Security for Reconû01gurable Systems on Chip by a Proof-Carrying Code Approach
S. Drzevitzky, M. Platzner, in: Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
LibreCat: /record/666
DOI: 10.1109/ReCoSoC.2011.5981499

Accurate gait phase detection using surface electromyographic signals and support vector machines
A. Boschmann, P. Kaufmann, M. Platzner, in: Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
LibreCat: /record/10637

Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems
A. Boschmann, M. Platzner, M. Robrecht, M. Hahn, M. Winkler, in: Proc. MyoElectric Controls Symposium (MEC), 2011.
LibreCat: /record/10638

Memory Virtualization for Multithreaded Reconfigurable Hardware
A. Agne, M. Platzner, E. Lübbers, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2011, pp. 185–188.
LibreCat: /record/13643
DOI: 10.1109/fpl.2011.42