Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1756–1764.https://doi.org/10.1145/3377929.3398106 
LibreCat: /record/17063
DOI: 10.1145/3377929.3398106

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2020). A Hybrid Synthesis Methodology for Approximate Circuits. In Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020 (pp. 421–426). Beijing, China: ACM.https://doi.org/10.1145/3386263.3406952 
LibreCat: /record/16213
DOI: 10.1145/3386263.3406952

Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM).https://doi.org/10.1145/3377929.3389968 
LibreCat: /record/16363
DOI: 10.1145/3377929.3389968

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw50202.2020.00012 
LibreCat: /record/20838
DOI: 10.1109/ipdpsw50202.2020.00012

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 6–16.https://doi.org/10.1109/IPDPSW50202.2020.00012 
LibreCat: /record/35152
DOI: 10.1109/IPDPSW50202.2020.00012

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
LibreCat: /record/16853

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM.https://doi.org/10.1145/3299874.3317998 
LibreCat: /record/10577
DOI: 10.1145/3299874.3317998

Ho, N., Kaufmann, P., &; Platzner, M. (2019). Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In World Congress on Nature and Biologically Inspired Computing (NaBIC). Springer.
LibreCat: /record/15422

Guettatfi, Z., Platzner, M., Kermia, O., &; Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw.2019.00027 
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, &; P. Diniz (Eds.), Applied Reconfigurable Computing (Vol. 11444, pp. 127–136). Springer International Publishing.https://doi.org/10.1007/978-3-030-17227-5_10 
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

Lösch, A., Wiens, A., &; Platzner, M. (2018). Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) (Vol. 10793, pp. 73–84). Cham: Springer International Publishing.https://doi.org/10.1007/978-3-319-77610-1_6 
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

Hansmeier, T., Platzner, M., &; Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing.https://doi.org/10.1007/978-3-319-78890-6_13 
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
LibreCat: /record/3586

Witschen, L. M., Wiersema, T., &; Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018).
LibreCat: /record/1165

Lösch, A., &; Platzner, M. (2018). A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Milan, Italy: IEEE.https://doi.org/10.1109/asap.2018.8445098 
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 219–224).https://doi.org/10.1109/VLSI-SoC.2018.8645026 
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

Lösch, A., &; Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).https://doi.org/10.1109/ASAP.2017.7995272 
LibreCat: /record/65
DOI: 10.1109/ASAP.2017.7995272

Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., &; Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In Design, Automation and Test in Europe (DATE).https://doi.org/10.23919/DATE.2017.7927137 
LibreCat: /record/10630
DOI: 10.23919/DATE.2017.7927137

Ho, N., Ashraf, I. I., Kaufmann, P., &; Platzner, M. (2017). Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In Proc. Design, Automation and Test in Europe Conf. (DATE).https://doi.org/10.23919/DATE.2017.7927096 
LibreCat: /record/10672
DOI: 10.23919/DATE.2017.7927096

Ho, N., Kaufmann, P., &; Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218).https://doi.org/10.1109/FPT.2017.8280144 
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144