M. H. Eisenring and M. Platzner, “An Implementation Framework for Run-time Reconfigurable Systems,” in Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 2000, pp. 151–157.

M. Eisenring and M. Platzner, “Optimization of Run-time Reconfigurable Embedded Systems,” in Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 2000, pp. 565–574.

O. Mencer and M. Platzner, “Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment,” in Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), 1999.

M. Eisenring, M. Platzner, and L. Thiele, “Communication Synthesis for Reconfigurable Embedded Systems,” in Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1999, vol. 1673, pp. 205–214.

M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 1998, pp. 69–78.

M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997, vol. 3166.

T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in Proceedings of the 8th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1997, pp. 829–833.

E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in Proceedings of the 7th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1996.

M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 1995, pp. 311–318.

E. Brenner et al., “High-Performance Simulators Based on Multi-TM0,” in Proceedings of the 5th Annual Texas Instruments TM0 Educators Conference, 1995.

G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 1995, pp. 695–698.

M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in Proceedings of the EUROSIM Congress, 1995, pp. 231–236.

M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 1995, pp. 494–501.

M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TM0 System,” in Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in Proceedings of the 7th Mediterranean Electrotechnical Conference, 1994.

M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TM0,” in Proceedings of the 4th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1993.

R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.