Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2024). DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing. To Apear in IEEE ISVLSI 2024. IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee, USA.

Ahmed, Q. A., Awais, M., &; Platzner, M. (2023). MAAS: Hiding Trojans in Approximate Circuits. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA.

Lienen, C., Brede, M., Karger, D., Koch, K., Logan, D., Mazur, J., Nowosad, A. P., Schnelle, A., Waizy, M., &; Platzner, M. (2023). AutonomROS: A ReconROS-based Autonomous Driving Unit. 2023 Seventh IEEE International Conference on Robotic Computing (IRC).https://doi.org/10.1109/irc59093.2023.00056 

Clausing, L., Guetattfi, Z., Kaufmann, P., Lienen, C., &; Platzner, M. (2023). On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconO. Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC).https://doi.org/10.1007/978-3-031-42921-7_17 

Lienen, C., Nowosad, A. P., &; Platzner, M. (n.d.). Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI).https://doi.org/10.1145/3637843.3637846 

Lienen, C., Middeke, S. H., &; Platzner, M. (2023). fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. https://doi.org/10.1109/IROS55552.2023.10341921__Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS).https://doi.org/10.1109/IROS55552.2023.10341921 

Jentzsch, F. (2023). Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML. 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL).https://doi.org/10.1109/fpl60245.2023.00066 

Witschen, L. M., Wiersema, T., Reuter, L. D., &; Platzner, M. (n.d.). Search Space Characterization for Approximate Logic Synthesis . 2022 59th ACM/IEEE Design Automation Conference (DAC). 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.

Witschen, L. M., Wiersema, T., Artmann, M., &; Platzner, M. (n.d.). MUSCAT: MUS-based Circuit Approximation Technique. Design, Automation and Test in Europe (DATE). Design, Automation and Test in Europe (DATE), Online.

Hansmeier, T., &; Platzner, M. (2022). Integrating Safety Guarantees into the Learning Classifier System XCS. Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, 13224, 386–401.https://doi.org/10.1007/978-3-031-02462-7_25 

Clausing, L., &; Platzner, M. (2022). ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 120–127.https://doi.org/10.1109/ipdpsw55747.2022.00029 

Hansmeier, T., Brede, M., &; Platzner, M. (2022). XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2071–2079.https://doi.org/10.1145/3520304.3533977 

Lienen, C., &; Platzner, M. (2022). ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.

Lienen, C., &; Platzner, M. (n.d.). Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.

Lienen, C., &; Platzner, M. (n.d.). Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. 2022 25th Euromicro Conference on Digital System Design (DSD). 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain.https://doi.org/10.1109/DSD57027.2022.00088 

Ahmed, Q. A., &; Platzner, M. (2022). On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM.https://doi.org/10.1145/3453688.3461506 

Awais, M., &; Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.

Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., &; Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, &; D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science.https://doi.org/10.1007/978-3-030-79025-7_4 

Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online.https://doi.org/10.1145/3468044.3468055