A Novel Technique and its Application to Computer Go
L. Schaefers, M. Platzner, IEEE Transactions on Computational Intelligence and AI in Games 6 (2014) 361–374.
LibreCat: /record/10602
DOI: 10.1109/TCIAIG.2014.2346997

An FPGA-based Reconfigurable Mesh Many-Core
H. Giefers, M. Platzner, IEEE Transactions on Computers 63 (2014) 2919–2932.
LibreCat: /record/10603
DOI: 10.1109/TC.2013.174

Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
LibreCat: /record/365
DOI: 10.1145/2617596

ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers
H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News 41 (2014) 65–70.
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices
S. Kasap, S. Redif, IEEE Trans. on Very Large Scale Integration (VLSI) Systems 22 (2013) 522–536.
LibreCat: /record/1792
DOI: 10.1109/TVLSI.2013.2248069

A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking
M. Happe, E. Lübbers, M. Platzner, International Journal of Real-Time Image Processing 8 (2013) 95–110.
LibreCat: /record/10604
DOI: doi:10.1007/s11554-011-0212-y

Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE Transactions on Evolutionary Computation 17 (2013) 46–63.
LibreCat: /record/10684
DOI: 10.1109/TEVC.2012.2185845

STIR: Software for Tomographic Image Reconstruction Release 2
K. Thielemans, C. Tsoumpas, S. Mustafovic, T. Beisel, P. Aguiar, N. Dikaios, M. W Jacobson, Physics in Medicine and Biology 57 (2012) 867–883.
LibreCat: /record/2172
DOI: 10.1088/0031-9155/57/4/867

Parallel algorithm for computation of second-order sequential best rotations
S. Redif, S. Kasap, Int. Journal of Electronics 100 (2012) 1646–1651.
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer
S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.
LibreCat: /record/2174

Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture
P. Kaufmann, K. Glette, M. Platzner, J. Torresen, International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3 (2012) 17–31.
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
LibreCat: /record/2177
DOI: 10.1155/2012/418315

FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification
S. Drzevitzky, U. Kastens, M. Platzner, International Journal of Reconfigurable Computing 2010 (2010).
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial)
U. Kebschull, M. Platzner, J. Teich, IET Computers Digital Techniques 4 (2010) 157–158.
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

ReconOS: Multithreaded Programming for Reconfigurable Computers
E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33.
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, EURASIP Journal on Embedded Systems 2007 (2007) 1–2.
LibreCat: /record/10625
DOI: 10.1155/2007/28405