Parallel algorithm for computation of second-order sequential best rotations
S. Redif, S. Kasap, Int. Journal of Electronics 100 (2012) 1646–1651.
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer
S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.
LibreCat: /record/2174

Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture
P. Kaufmann, K. Glette, M. Platzner, J. Torresen, International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3 (2012) 17–31.
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
LibreCat: /record/2177
DOI: 10.1155/2012/418315

FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification
S. Drzevitzky, U. Kastens, M. Platzner, International Journal of Reconfigurable Computing 2010 (2010).
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial)
U. Kebschull, M. Platzner, J. Teich, IET Computers Digital Techniques 4 (2010) 157–158.
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

ReconOS: Multithreaded Programming for Reconfigurable Computers
E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33.
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, EURASIP Journal on Embedded Systems 2007 (2007) 1–2.
LibreCat: /record/10625
DOI: 10.1155/2007/28405

Server-based execution of periodic tasks on dynamically reconfigurable hardware
K. Danne, R. Mühlenbernd, M. Platzner, IET Computers Digital Techniques 1 (2007) 295–302.
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks
C. Steiger, H. Walder, M. Platzner, IEEE Transactions on Computers 53 (2004) 1393–1407.
LibreCat: /record/10742
DOI: 10.1109/tc.2004.99

The Case for Reconfigurable Hardware in Wearable Computing
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, G. Tröster, Personal and Ubiquitous Computing 7 (2003) 299–308.
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x

Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, Journal of Supercomputing 26 (2003) 109–129.
LibreCat: /record/2420
DOI: 10.1023/a:1024443416592

A Framework for Run-time Reconfigurable Systems
M. Eisenring, M. Platzner, The Journal of Supercomputing 21 (2002) 145–159.
LibreCat: /record/10651
DOI: 10.1023/a:1013627403946

Object-oriented domain specific compilers for programming FPGAs
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (2001) 205–210.
LibreCat: /record/10713
DOI: 10.1109/92.920835

Reconfigurable accelerators for combinatorial problems
M. Platzner, Computer 33 (2000) 58–60.
LibreCat: /record/6507
DOI: 10.1109/2.839322

Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, IEE Proceedings -- Computers &; Digital Techniques 147 (2000) 159–165.
LibreCat: /record/10606
DOI: 10.1049/ip-cdt:20000496

Toward embedded qualitative simulation: a specialized computer architecture for QSim
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
LibreCat: /record/10725
DOI: 10.1109/5254.850829