Redif, Soydan, and Server Kasap. “Parallel Algorithm for Computation of Second-Order Sequential Best Rotations.”https://doi.org/10.1080/00207217.2012.751343__Int. Journal of Electronics 100, no. 12 (2012): 1646–51.https://doi.org/10.1080/00207217.2012.751343 .
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Kasap, Server, and Khaled Benkrid. “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer.” Journal of Computers 7, no. 6 (2012): 1312–28.
LibreCat: /record/2174

Kaufmann, Paul, Kyrre Glette, Marco Platzner, and Jim Torresen. “Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.”https://doi.org/10.4018/jaras.2012100102__International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3, no. 4 (2012): 17–31.https://doi.org/10.4018/jaras.2012100102 .
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.”https://doi.org/10.1016/j.micpro.2011.04.002__Microprocessors and Microsystems 36, no. 2 (2012): 110–26.https://doi.org/10.1016/j.micpro.2011.04.002 .
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.”https://doi.org/10.1155/2012/418315__Int. Journal of Reconfigurable Computing (IJRC), 2012.https://doi.org/10.1155/2012/418315 .
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.”https://doi.org/10.1155/2011/760954__Int. Journal of Recon- Figurable Computing (IJRC), 2011.https://doi.org/10.1155/2011/760954 .
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Drzevitzky, Stephanie, Uwe Kastens, and Marco Platzner. “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification.”https://doi.org/10.1155/2010/180242__International Journal of Reconfigurable Computing 2010 (2010).https://doi.org/10.1155/2010/180242 .
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Kebschull, Udo, Marco Platzner, and Jürgen Teich. “Selected Papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (Editorial).”https://doi.org/10.1049/iet-cdt.2010.9044__IET Computers Digital Techniques 4, no. 3 (2010): 157–58.https://doi.org/10.1049/iet-cdt.2010.9044 .
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.”https://doi.org/10.1145/1596532.1596540__ACM Transactions on Embedded Computing Systems 9, no. 1 (2009): 8:1-8:33.https://doi.org/10.1145/1596532.1596540 .
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Bergmann, Neil, Marco Platzner, and Jürgen Teich. “Dynamically Reconfigurable Architectures (Editorial).”https://doi.org/10.1155/2007/28405__EURASIP Journal on Embedded Systems 2007 (2007): 1–2.https://doi.org/10.1155/2007/28405 .
LibreCat: /record/10625
DOI: 10.1155/2007/28405

Danne, Klaus, Roland Mühlenbernd, and Marco Platzner. “Server-Based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware.”https://doi.org/10.1049/iet-cdt:20060186__IET Computers Digital Techniques 1, no. 4 (2007): 295–302.https://doi.org/10.1049/iet-cdt:20060186 .
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

Enzler, Rolf, Christian Plessl, and Marco Platzner. “System-Level Performance Evaluation of Reconfigurable Processors.”https://doi.org/10.1016/j.micpro.2004.06.004__Microprocessors and Microsystems 29, no. 2–3 (2005): 63–73.https://doi.org/10.1016/j.micpro.2004.06.004 .
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Steiger, Christoph, Herbert Walder, and Marco Platzner. “Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks.”https://doi.org/10.1109/tc.2004.99__IEEE Transactions on Computers 53, no. 11 (2004): 1393–1407.https://doi.org/10.1109/tc.2004.99 .
LibreCat: /record/10742
DOI: 10.1109/tc.2004.99

Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, and Gerhard Tröster. “The Case for Reconfigurable Hardware in Wearable Computing.”https://doi.org/10.1007/s00779-003-0243-x__Personal and Ubiquitous Computing 7, no. 5 (2003): 299–308.https://doi.org/10.1007/s00779-003-0243-x .
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.”https://doi.org/10.1023/a:1024443416592__Journal of Supercomputing 26, no. 2 (2003): 109–29.https://doi.org/10.1023/a:1024443416592 .
LibreCat: /record/2420
DOI: 10.1023/a:1024443416592

Eisenring, Michael, and Marco Platzner. “A Framework for Run-Time Reconfigurable Systems.”https://doi.org/10.1023/a:1013627403946__The Journal of Supercomputing 21, no. 2 (2002): 145–59.https://doi.org/10.1023/a:1013627403946 .
LibreCat: /record/10651
DOI: 10.1023/a:1013627403946

Mencer, Oskar, Marco Platzner, Martin Morf, and Michael J. Flynn. “Object-Oriented Domain Specific Compilers for Programming FPGAs.”https://doi.org/10.1109/92.920835__IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9, no. 1 (2001): 205–10.https://doi.org/10.1109/92.920835 .
LibreCat: /record/10713
DOI: 10.1109/92.920835

Platzner, Marco. “Reconfigurable Accelerators for Combinatorial Problems.”https://doi.org/10.1109/2.839322__Computer 33, no. 4 (2000): 58–60.https://doi.org/10.1109/2.839322 .
LibreCat: /record/6507
DOI: 10.1109/2.839322

Eisenring, Michael, and Marco Platzner. “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems.”https://doi.org/10.1049/ip-cdt:20000496__IEE Proceedings -- Computers &; Digital Techniques 147 (2000): 159–65.https://doi.org/10.1049/ip-cdt:20000496 .
LibreCat: /record/10606
DOI: 10.1049/ip-cdt:20000496

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.”https://doi.org/10.1109/5254.850829__IEEE Intelligent Systems 15, no. 2 (2000): 62–68.https://doi.org/10.1109/5254.850829 .
LibreCat: /record/10725
DOI: 10.1109/5254.850829