Bauer, C., Kenter, T., Lass, M., Mazur, L., Meyer, M., Nitsche, H., Riebler, H., Schade, R., Schwarz, M., Winnwa, N., Wiens, A., Wu, X., Plessl, C., &; Simon, J. (2024). Noctua 2 Supercomputer. Journal of Large-Scale Research Facilities, 9.https://doi.org/10.17815/jlsrf-8-187  

Granhão, D., &; Canas Ferreira, J. C. (2021). Transparent Control Flow Transfer between CPU and Accelerators for HPC. Electronics.https://doi.org/10.3390/electronics10040406 

Castells-Rufas, D., Marco-Sola, S., Aguado-Puig, Q., Espinosa-Morales, A., Moure, J. C., Alvarez, L., &; Moreto, M. (2021). OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors. 2021 31st International Conference on Field-Programmable Logic and Applications (FPL).https://doi.org/10.1109/fpl53798.2021.00036 

Alberto Oliveira de Souza Junior, C., Bispo, J., Cardoso, J. M. P., Diniz, P. C., &; Marques, E. (2020). Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture. Electronics.https://doi.org/10.3390/electronics9050843 

Souza, M. A., Maciel, L. A., Penna, P. H., &; Freitas, H. C. (2019). Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package. In 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD).https://doi.org/10.1109/cahpc.2018.8645850 

Sommer, L., Oppermann, J., Molina, A., Binnig, C., Kersting, K., &; Koch, A. (2019). Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. In 2018 IEEE 36th International Conference on Computer Design (ICCD).https://doi.org/10.1109/iccd.2018.00060 

Yan, H., Li, Z., Liu, L., Yin, S., &; Wei, S. (2019). Constructing Concurrent Data Structures on FPGA with Channels. In Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays.https://doi.org/10.1145/3289602.3293921 

Wang, H., Thiagaraj, P., &; Sinnen, O. (2019). Combining Multiple Optimized FPGA-based Pulsar Search Modules Using OpenCL. Journal of Astronomical Instrumentation.https://doi.org/10.1142/s2251171719500089 

Faict, T., D’Hollander, E. H., &; Goossens, B. (2019). Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL. Algorithms.https://doi.org/10.3390/a12080149 

Rodríguez, A., Navarro, A., Asenjo, R., Corbera, F., Gran, R., Suárez, D., &; Nunez-Yanez, J. (2019). Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform. The Journal of Supercomputing.https://doi.org/10.1007/s11227-019-02935-1 

Li, Z., Liu, L., Deng, Y., Wang, J., Liu, Z., Yin, S., &; Wei, S. (2019). FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory. In Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture.https://doi.org/10.1145/3352460.3358270 

Li, Z., Liu, L., Deng, Y., Yin, S., &; Wei, S. (2018). Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution. IEEE Computer Architecture Letters, 147–150.https://doi.org/10.1109/lca.2018.2828402 

Ceissler, C., Nepomuceno, R., Pereira, M., &; Araujo, G. (2018). Automatic Offloading of Cluster Accelerators. In 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).https://doi.org/10.1109/fccm.2018.00058 

Solis-Vasquez, L., &; Koch, A. (2018). A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software. In FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers (pp. 1–10).