S. Holst et al., “Logic Fault Diagnosis of Hidden Delay Defects,” 2020.

M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, and H.-J. Wunderlich, “Built-in Test for Hidden Delay Faults,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 10, pp. 1956–1968, 2019.

M. Kampmann and S. Hellebrand, “Design For Small Delay Test - A Simulation Study,” Microelectronics Reliability, vol. 80, pp. 124–133, 2018.

M. Kampmann and S. Hellebrand, Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 19th Workshop on RTL and High Level Testing (WRTLT’18), Hefei, Anhui, China, 2018.

C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, and H.-J. Wunderlich, “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention,”10.1109/ats.2018.00028__2018, doi:10.1109/ats.2018.00028 .

M. Kampmann and S. Hellebrand, X-tolerante Prüfzellengruppierung für den Test mit erhöhter Betriebsfrequenz. 29. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’17), Lübeck, Germany, 2017.

M. Kampmann and S. Hellebrand, “Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test,”10.1109/ddecs.2017.7934564__2017, doi:10.1109/ddecs.2017.7934564 .

M. Kampmann and S. Hellebrand, “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test,” in 25th IEEE Asian Test Symposium (ATS’16), 2016, pp. 1–6.

M. Kampmann, M. A. Kochte, E. Schneider, T. Indlekofer, S. Hellebrand, and H.-J. Wunderlich, “Optimized Selection of Frequencies for Faster-Than-at-Speed Test,” in 24th IEEE Asian Test Symposium (ATS’15), 2015, pp. 109–114.

S. Hellebrand, T. Indlekofer, M. Kampmann, M. Kochte, C. Liu, and H.-J. Wunderlich, Effiziente Auswahl von Testfrequenzen für den Test kleiner Verzögerungsfehler. 27. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’15), Bad Urach, Germany, 2015.

S. Hellebrand, T. Indlekofer, M. Kampmann, M. A. Kochte, C. Liu, and H.-J. Wunderlich, “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects,” in IEEE International Test Conference (ITC’14), 2014.