Rupeas: Ruby Powered Event Analysis DSL
M. Woehrle, C. Plessl, L. Thiele, Rupeas: Ruby Powered Event Analysis DSL, Computer Engineering and Networks Lab, ETH Zurich, 2009.
LibreCat: /record/2353

IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

EvoCaches: Application-specific Adaptation of Cache Mapping
P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.
LibreCat: /record/2262

PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes
J. Beutel, S. Gruber, A. Hasler, R. Lim, A. Meier, C. Plessl, I. Talzi, L. Thiele, C. Tschudin, M. Woehrle, M. Yuecel, in: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, Washington, DC, USA, 2009, pp. 265–276.
LibreCat: /record/2352

Communication Performance Characterization for Reconfigurable Accelerator Design on the 
T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.
LibreCat: /record/2261

Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.
LibreCat: /record/2263

EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks
M. Woehrle, C. Plessl, R. Lim, J. Beutel, L. Thiele, in: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, Los Alamitos, CA, USA, 2008, pp. 201–208.
LibreCat: /record/2370
DOI: 10.1109/SUTC.2008.24

A Hardware Accelerator for k-th Nearest Neighbor Thinning
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
LibreCat: /record/2364

IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers
T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat: /record/2372

Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework
J. Beutel, C. Plessl, M. Woehrle, Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework, Computer Engineering and Networks Laboratory, ETH Zurich, 2007.
LibreCat: /record/2394

Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework
M. Woehrle, C. Plessl, J. Beutel, L. Thiele, in: Proc. Workshop on Embedded Networked Sensors (EmNets), ACM, New York, NY, USA, 2007, pp. 93–97.
LibreCat: /record/2392
DOI: 10.1145/1278972.1278996

Automated Wireless Sensor Network Testing
J. Beutel, M. Dyer, R. Lim, C. Plessl, M. Woehrle, M. Yuecel, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, Piscataway, NJ, USA, 2007, pp. 303–303.
LibreCat: /record/2393
DOI: 10.1109/INSS.2007.4297445

Hardware virtualization on a coarse-grained reconfigurable processor
C. Plessl, Hardware Virtualization on a Coarse-Grained Reconfigurable Processor, Shaker Verlag, Aachen, Germany, 2006.
LibreCat: /record/2404
DOI: 10.2370/9783832255619

Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Virtualization of Hardware – Introduction and Survey
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
LibreCat: /record/2415

TKDM – A Reconfigurable Co-processor in a PC's Memory Slot
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–259.
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

The Case for Reconfigurable Hardware in Wearable Computing
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, G. Tröster, Personal and Ubiquitous Computing 7 (2003) 299–308.
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x