M. Woehrle, C. Plessl, and L. Thiele, Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich, 2009.
LibreCat: /record/2353

T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,”10.1109/FCCM.2009.25__in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi:10.1109/FCCM.2009.25 .
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat: /record/2262

J. Beutel et al., “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes,” in Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 2009, pp. 265–276.
LibreCat: /record/2352

T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the ,”10.1109/ReConFig.2009.32__in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi:10.1109/ReConFig.2009.32 .
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
LibreCat: /record/2261

M. Grad and C. Plessl, “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2009, pp. 319–322.
LibreCat: /record/2263

M. Woehrle, C. Plessl, R. Lim, J. Beutel, and L. Thiele, “EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks,”10.1109/SUTC.2008.24__in IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 2008, pp. 201–208, doi:10.1109/SUTC.2008.24 .
LibreCat: /record/2370
DOI: 10.1109/SUTC.2008.24

T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat: /record/2364

T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.
LibreCat: /record/2372

J. Beutel, C. Plessl, and M. Woehrle, Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich, 2007.
LibreCat: /record/2394

M. Woehrle, C. Plessl, J. Beutel, and L. Thiele, “Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework,”10.1145/1278972.1278996__in Proc. Workshop on Embedded Networked Sensors (EmNets), 2007, pp. 93–97, doi:10.1145/1278972.1278996 .
LibreCat: /record/2392
DOI: 10.1145/1278972.1278996

J. Beutel et al., “Automated Wireless Sensor Network Testing,”10.1109/INSS.2007.4297445__in Proc. Int. Conf. Networked Sensing Systems (INSS), 2007, pp. 303–303, doi:10.1109/INSS.2007.4297445 .
LibreCat: /record/2393
DOI: 10.1109/INSS.2007.4297445

C. Plessl, Hardware virtualization on a coarse-grained reconfigurable processor. Aachen, Germany: Shaker Verlag, 2006.
LibreCat: /record/2404
DOI: 10.2370/9783832255619

C. Plessl, M. Platzner, and L. Thiele, “Optimal Temporal Partitioning based on Slowdown and Retiming,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2006, pp. 345–348.
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array with support for hardware virtualization,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2005, pp. 213–218.
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

R. Enzler, C. Plessl, and M. Platzner, “System-level performance evaluation of reconfigurable processors,” Microprocessors and Microsystems, vol. 29, no. 2–3, pp. 63–73, 2005.
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
LibreCat: /record/2415

C. Plessl and M. Platzner, “TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2003, pp. 252–259.
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

C. Plessl et al., “The Case for Reconfigurable Hardware in Wearable Computing,” Personal and Ubiquitous Computing, vol. 7, no. 5, pp. 299–308, 2003.
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x