Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat: /record/2180

On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Estimation and Partitioning for CPU-Accelerator Architectures
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
LibreCat: /record/2191

Hardware Virtualization on Dynamically Reconfigurable Embedded Processors
C. Plessl, M. Platzner, in: M. Khalgui, H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, IGI Global, Hershey, PA, USA, 2011.
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Evolution of Electronic Circuits
L. Sekanina, J.A. Walker, P. Kaufmann, C. Plessl, M. Platzner, in: Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
LibreCat: /record/10737

Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Measuring and Predicting Temperature Distributions on FPGAs at Run-Time
M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.
LibreCat: /record/2223

Pruning the Design Space for Just-In-Time Processor Customization
M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

An Open Source Circuit Library with Benchmarking Facilities
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.
LibreCat: /record/2224

Configurable Processor Architectures: History and Trends
D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
LibreCat: /record/2220

Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)
T.P. Plaks, D. Andrews, R. DeMara, H. Lam, J. Lee, C. Plessl, G. Stitt, eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
LibreCat: /record/2222

Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators
T. Beisel, M. Niekamp, C. Plessl, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72.
LibreCat: /record/2226
DOI: 10.1109/ASAP.2010.5540798

Reconfigurable Nodes for Future Networks
A. Keller, B. Plattner, E. Lübbers, M. Platzner, C. Plessl, in: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–376.
LibreCat: /record/2206
DOI: 10.1109/GLOCOMW.2010.5700341

Rupeas: Ruby Powered Event Analysis DSL
M. Woehrle, C. Plessl, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–248.
LibreCat: /record/2227
DOI: 10.1109/INSS.2010.5572211

Performance Estimation for the Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: O. Hammami, S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat: /record/2228