Woehrle, M., Plessl, C., &; Thiele, L. (2009). Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich.
LibreCat: /record/2353

Schumacher, T., Plessl, C., &; Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–278.https://doi.org/10.1109/FCCM.2009.25 
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

Kaufmann, P., Plessl, C., &; Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18.
LibreCat: /record/2262

Beutel, J., Gruber, S., Hasler, A., Lim, R., Meier, A., Plessl, C., Talzi, I., Thiele, L., Tschudin, C., Woehrle, M., &; Yuecel, M. (2009). PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 265–276.
LibreCat: /record/2352

Schumacher, T., Süß, T., Plessl, C., &; Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the . Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–124.https://doi.org/10.1109/ReConFig.2009.32 
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

Schumacher, T., Plessl, C., &; Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–344.
LibreCat: /record/2261

Grad, M., &; Plessl, C. (2009). Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–322.
LibreCat: /record/2263

Woehrle, M., Plessl, C., Lim, R., Beutel, J., &; Thiele, L. (2008). EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 201–208.https://doi.org/10.1109/SUTC.2008.24 
LibreCat: /record/2370
DOI: 10.1109/SUTC.2008.24

Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., &; Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–251.
LibreCat: /record/2364

Schumacher, T., Plessl, C., &; Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. Many-Core and Reconfigurable Supercomputing Conference (MRSC).
LibreCat: /record/2372

Beutel, J., Plessl, C., &; Woehrle, M. (2007). Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich.
LibreCat: /record/2394

Woehrle, M., Plessl, C., Beutel, J., &; Thiele, L. (2007). Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework. Proc. Workshop on Embedded Networked Sensors (EmNets), 93–97.https://doi.org/10.1145/1278972.1278996 
LibreCat: /record/2392
DOI: 10.1145/1278972.1278996

Beutel, J., Dyer, M., Lim, R., Plessl, C., Woehrle, M., Yuecel, M., &; Thiele, L. (2007). Automated Wireless Sensor Network Testing. Proc. Int. Conf. Networked Sensing Systems (INSS), 303–303.https://doi.org/10.1109/INSS.2007.4297445 
LibreCat: /record/2393
DOI: 10.1109/INSS.2007.4297445

Plessl, C. (2006). Hardware virtualization on a coarse-grained reconfigurable processor. Aachen, Germany: Shaker Verlag.https://doi.org/10.2370/9783832255619 
LibreCat: /record/2404
DOI: 10.2370/9783832255619

Plessl, C., Platzner, M., &; Thiele, L. (2006). Optimal Temporal Partitioning based on Slowdown and Retiming. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 345–348). IEEE Computer Society.https://doi.org/10.1109/FPT.2006.270344 
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Plessl, C., &; Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 213–218). IEEE Computer Society.https://doi.org/10.1109/ASAP.2005.69 
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

Enzler, R., Plessl, C., &; Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73.https://doi.org/10.1016/j.micpro.2004.06.004 
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Plessl, C., &; Platzner, M. (2004). Virtualization of Hardware – Introduction and Survey. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 63–69). CSREA Press.
LibreCat: /record/2415

Plessl, C., &; Platzner, M. (2003). TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 252–259). IEEE Computer Society.https://doi.org/10.1109/FPT.2003.1275755 
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., &; Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308.https://doi.org/10.1007/s00779-003-0243-x 
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x