Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation
F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, Greece, 2014.
LibreCat: /record/24305
DOI: 10.1109/SAMOS.2014.6893219

Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, C. Scheytt, Design and Verification Conference (DVCON EUROPE) (2014).
LibreCat: /record/24302

Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure
C. Kuznik, W. Müller, Design, Automation and Test in Europe DATE, University Booth, Dresden (2014).
LibreCat: /record/24309

Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges
J.-H. Oetjens, M. Becker, C. Kuznik, W. Müller, N. Bannow, O. Brinkmann, A. Burger, M. Chaari, S. Chakraborty, R. Drechsler, W. Ecker, K. Grüttner, T. Kruse, H.M. Le, M. Mauderer, D. Mueller-Gritschneider, F. Poppen, H. Post, Se. Reiter, W. Rosenstiel, S. Roth, U. Schlichtmann, A. Von Schwerin, B.A. Tabacaru, A. Viehl, in: Design Automation Conference (DAC), 2014.
LibreCat: /record/24311
DOI: 10.1145/2593069.2602976

Architectural Low-Power Design Using Transaction-Based System Simulation
F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014.
LibreCat: /record/25120

Source code annotated memory leak detection for soft real time embedded systems with resource constraints
M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: 12th IEEE International Conference on Embedded Computing, 2014.
LibreCat: /record/25146

Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation
F. Mischkalla, W. Müller, in: PATMOS 2014, Palma de Mallorca, Spain, 2014.
LibreCat: /record/25144

Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems
M. Becker, C. Kuznik, W. Müller, in: IEEE, Berlin, 2014.
LibreCat: /record/36918
DOI: 10.1109/ICCPS.2014.6843726

An Assisted Single Source Verification Metric Model Code Generation Methodology
C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.
LibreCat: /record/36917

Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM
C. Kuznik, W. Müller, in: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.
LibreCat: /record/25166

Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung
C. Kuznik, B.G. Defo, W. Müller, in: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) , 2014.
LibreCat: /record/25163

An Assisted Single Source Verification Metric Model Code Generation Methodology
C. Kuznik, B.G. Defo, W. Müller, Electronic System Level Synthesis Conference (ESLSyn) (2014).
LibreCat: /record/25151

Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
B. Koppelmann, B. Messidat, M. Becker, W. Müller, J.C. Scheytt, in: Proceedings of the Design and Verification Conference Europe (DVCON Europe), München, 2014.
LibreCat: /record/34585

HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC
M. Becker, W. Müller, J. Stroop, U. Kiffmeier, Design, Automation and Test in Europe DATE, University Booth, Dresden (2014).
LibreCat: /record/25164

Early Phase Memory Leak Detection in Embedded Software Designs with Virtual Memory Management Model
M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society, Linköping University Electronic Press, 2013.
LibreCat: /record/25270

AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS
D. He, W. Müller, in: Proceedings of International Conference on Applied Computing (AC), 2013.
LibreCat: /record/25271

 Efficient Power Intent Validation Using Loosely-Timed Simulation Models
F. Mischkalla, W. Müller, in:  23rd International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep. 2013, 2013.
LibreCat: /record/25284

HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures
M. Becker, U. Kiffmeier, W. Müller, in: 16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013.
LibreCat: /record/25291

SystemC Verification Components - An enhanced OVM/UVM for SystemC
C. Kuznik, M. F. S. Oliveira, W. Müller, in: EdaWorkshop 13, 2013.
LibreCat: /record/25606

Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen
F. Mischkalla, W. Müller, in: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013.
LibreCat: /record/25612