@inproceedingsLuchterhandt_Nellius_Beck_Dömer_Kneuper_Müller_Sadiye_2024, title=Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells, booktitle=MBMV 2024 - 27. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen“, publisher=VDE Verlag, author=Luchterhandt, Lars and Nellius, Tom and Beck, Robert and Dömer, Rainer and Kneuper, Pascal and Müller, Wolfgang and Sadiye, Babak, year=2024 

@inproceedingsPalomero Bernardo_Schmid_Bringmann_Iftekhar_Sadiye_Müller_Koch_Jentsch_Sauer_Feldner_et al._2024, title=A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing, booktitle=DATE 24 - Design Automation and Test in Europe, author=Palomero Bernardo, Paul and Schmid, Patrick and Bringmann, Oliver and Iftekhar, Mohammed and Sadiye, Babak and Müller, Wolfgang and Koch, Andreas and Jentsch, Eyck and Sauer, Axel and Feldner, Ingo and et al., year=2024 

@inproceedingsLuchterhandt_Nellius_Beck_Dömer_Kneuper_Müller_Sadiye_2023, title=Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture, booktitle=MBMV 2023 - 26. Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen“, MBMV 2023, Freiburg, publisher=VDE Verlag, author=Luchterhandt, Lars and Nellius, Tom and Beck, Robert and Dömer, Rainer and Kneuper, Pascal and Müller, Wolfgang and Sadiye, Babak, year=2023 

@inproceedingsEcker_Krstic_Ulbricht_Mauderer_Jentzsch_Koch_Koppelmann_Müller_Sadiye_Bruns_et al._2023, title=Scale4Edge – Scaling RISC-V for Edge Applications, booktitle=RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., author=Ecker, Wolfgang and Krstic, Milos and Ulbricht, Markus and Mauderer, Andreas and Jentzsch, Eyck and Koch, Andreas and Koppelmann, Bastian and Müller, Wolfgang and Sadiye, Babak and Bruns, Niklas and et al., year=2023 

@inproceedingsMüller_Ulbricht_Li_Krstic_2023, title=Der TETRISC SoC - Ein resilientes Quad-Core System auf Pulpissimo-Basis, booktitle=5. ITG / GMM / GI -Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen , author=Müller, Wolfgang and Ulbricht, Markus and Li, Lu and Krstic, Milos, year=2023 

@inproceedingsIftekhar_Gowda_Kneuper_Sadiye_Müller_Scheytt_2023, title=A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology, DOI=10.1109/BCICTS54660.2023.10310954, booktitle=2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), author=Iftekhar, Mohammed and Gowda, Harshan and Kneuper, Pascal and Sadiye, Babak and Müller, Wolfgang and Scheytt, Christoph, year=2023 

@inproceedingsEcker_Adelt_Müller_Heckmann_Krstic_Herdt_Drechsler_Angst_Wimmer_Mauderer_et al._2022, title=The Scale4Edge RISC-V Ecosystem, booktitle=In Proceedings of the Design Automation and Test Conference and Exhibition (DATE 2022), author=Ecker, Wolfgang and Adelt, Peer and Müller, Wolfgang and Heckmann, Reinhold and Krstic, Milos and Herdt, Vladimir and Drechsler, Rolf and Angst, Gerhard and Wimmer, Ralf and Mauderer, Andreas and et al., year=2022 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_2021, place=Munich, DE, title=Register and Instruction Coverage Analysis for Different RISC-V ISA Modules, booktitle=MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop, publisher=VDE, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2021 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_2021, place=Munich, DE, title=QEMU zur Simulation von Worst-Case-Ausfuhrungszeiten, booktitle=MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop, publisher=VDE, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2021 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_2021, title=Register and Instruction Coverage Analysis for Different RISC-V ISA Modules, booktitle=Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2021), author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2021 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_2020, place=Stuttgart, DE, title=A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures, booktitle=MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2020 

@inproceedingsKoppelmann_Adelt_Müller_Scheytt_2019, place=Rhodos, Griechenland, title=RISC-V Extensions for Bit Manipulation Instructions, DOI=10.1109/PATMOS.2019.8862170, booktitle=29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), author=Koppelmann, Bastian and Adelt, Peer and Müller, Wolfgang and Scheytt, Christoph, year=2019 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_2019, place=Kaiserslautern, DE, title=Analyse sicherheitskritischer Software fur RISC-V Prozessoren, booktitle=MBMV 2019-22.Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2019), author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2019 

@inproceedingsAdelt_Koppelmann_Müller_Scheytt_Driessen_2019, place=Florence, Italy, title=QEMU for Dynamic Memory Analysis of Security Sensitive Software, booktitle= 2nd International Workshop on Embedded Software for Industrial IoT in conjunction with DATE 2019, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph and Driessen, Benedikt, year=2019, pages=32–34 

@articleAdelt_Koppelmann_Müller_Scheytt_2019, title=QEMU Support for RISC-V: Current State and Future Releases, volume=(Presentation), journal=2nd International Workshop on RISC-V Research Activities, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph, year=2019 

@bookBringmann_Ecker_Müller_Müller-Gridschneder_2019, place=Florence, Italy, title=Proceedings of the 2nd International Workshop on Embedded Software for Industrial IoT - ESIIT, year=2019 

@articleAdelt_Koppelmann_Müller_2018, title=Current and Future RISC-V Activities for Virtual Prototyping and Chip Design, volume=Presentation, journal=International Workshop on RISC-V Research Activities, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang, year=2018 

@inproceedingsWu_Hussain_Abughannam_Müller_Scheytt_Ecker_2018, place=Italy/Taormina, title=Analog fault simulation automation at schematic level with random sampling techniques, DOI=10.1109/DTIS.2018.8368549, booktitle=2018 13th International Conference on Design &; Technology of Integrated Systems In Nanoscale Era (DTIS)) , publisher=IEEE, author=Wu, Liang and Hussain, Mohammad Khizer and Abughannam, Saed and Müller, Wolfgang and Scheytt, Christoph and Ecker, Wolfgang, year=2018 

@bookBringmann_Ecker_Müller_Müller-Gridschneder_2018, place=Dresden, Germany, title=Proceedings of the 1st International Workshop on Embedded Software for Industrial IoT - ESIIT, year=2018 

@inproceedingsAdelt_Koppelmann_Müller_Mueller-Gritschneder_Kleinjohann_Scheytt_2017, place=Germany, Paderborn, title=Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen, DOI=10.17619/UNIPB/1-93, booktitle=Tagungsband des Wissenschaftsforums Intelligente Technische Systeme, publisher=Verlagsschriftenreihe des Heinz Nixdorf Instituts, author=Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Mueller-Gritschneder, Daniel and Kleinjohann, Bernd and Scheytt, Christoph, year=2017