Hellebrand, Sybille. Selbsttestbare Steuerwerke - Strukturen Und Syntheseverfahren. 10. Verlag Dr. Kovac, Hamburg: Verlag Dr. Kovac, Hamburg, 1999.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop, 1999.

Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded DRAMs.”https://doi.org/10.1109/vtest.1999.766693__In 17th IEEE VLSI Test Symposium (VTS’99), 384–90. Dana Point, CA, USA: IEEE, 1999.https://doi.org/10.1109/vtest.1999.766693 .

N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” In Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, 1999.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Symmetric Transparent BIST for RAMs.” In Design Automation and Test in Europe (DATE’99), 702–7. Munich, Germany, 1999.

Hellebrand, Sybille, and Hans-Joachim Wunderlich. Test Und Synthese Schneller Eingebetteter Systeme. Universität Stuttgart, 1998.

N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.

N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop, 1998.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In Mixed-Mode BIST Using Embedded Processors. 5. In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: Kluwer Academic Publishers, 1998.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA 12, no. 1/2 (1998): 127–38.

Hellebrand, Sybille, Andre Hertwig, and Hans-Joachim Wunderlich. “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications.” IEEE Design and Test 15, no. 4 (1998): 36–41.

Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast Self-Recovering Controllers.”https://doi.org/10.1109/vtest.1998.670883__In 16th IEEE VLSI Test Symposium (VTS’98), 296–302. Monterey, CA, USA: IEEE, 1998.https://doi.org/10.1109/vtest.1998.670883 .

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.”https://doi.org/10.1109/date.1998.655853__In Design Automation and Test in Europe (DATE’98), 173–79. Paris, France, 1998.https://doi.org/10.1109/date.1998.655853 .

N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” In Design &; Diagnostics of Electronic Circuits &; Systems (DDECS’98), 27–33. Szczyrk, Poland, 1998.

Tsai, Kun-Han, Sybille Hellebrand, Janusz Rajski, and Malgorzata Marek-Sadowska. STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1997.

Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece, 1997.

Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.”https://doi.org/10.1109/dac.1997.597194__In 34th ACM/IEEE Design Automation Conference (DAC’97). Anaheim, CA, USA: IEEE, 1997.https://doi.org/10.1109/dac.1997.597194 .

Hellebrand, Sybille, and Hans-Joachim Wunderlich. Using Embedded Processors for BIST. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1996.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. Mixed-Mode BIST Using Embedded Processors. 2nd IEEE International On-Line Testing Workshop. Biarritz, France, 1996.

Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.”https://doi.org/10.1109/test.1996.556962__In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996.https://doi.org/10.1109/test.1996.556962 .