Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms
R. Schade, T. Kenter, H. Elgabarty, M. Lass, O. Schütt, A. Lazzaro, H. Pabst, S. Mohr, J. Hutter, T. Kühne, C. Plessl, Parallel Computing 111 (2022).

In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL
M. Meyer, T. Kenter, C. Plessl, Journal of Parallel and Distributed Computing (2022).

The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations
J. Menzel, C. Plessl, T. Kenter, ACM Transactions on Reconfigurable Technology and Systems 15 (2021) 1–30.

High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection
M. Karp, A. Podobas, N. Jansson, T. Kenter, C. Plessl, P. Schlatter, S. Markidis, in: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021.

HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids
S. Alhaddad, J. Förstner, S. Groth, D. Grünewald, Y. Grynko, F. Hannig, T. Kenter, F.-J. Pfreundt, C. Plessl, M. Schotte, T. Steinke, J. Teich, M. Weiser, F. Wende, in: Euro-Par 2020: Parallel Processing Workshops, Cham, 2021.

Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing
A. Ramaswami, T. Kenter, T. Kühne, C. Plessl, in: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, Cham, 2021.

The HighPerMeshes framework for numerical algorithms on unstructured grids
S. Alhaddad, J. Förstner, S. Groth, D. Grünewald, Y. Grynko, F. Hannig, T. Kenter, F. Pfreundt, C. Plessl, M. Schotte, T. Steinke, J. Teich, M. Weiser, F. Wende, Concurrency and Computation: Practice and Experience (2021) e6616.

High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection
M. Karp, A. Podobas, N. Jansson, T. Kenter, C. Plessl, P. Schlatter, S. Markidis, in: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021.

Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA
T. Kenter, A. Shambhu, S. Faghih-Naini, V. Aizinger, in: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), ACM, 2021.

Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite
M. Meyer, T. Kenter, C. Plessl, in: 2020 IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC), 2020.

Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, ACM Trans. Archit. Code Optim. (TACO) 16 (2019) 14:1–14:26.

OpenCL Implementation of Cannon's Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs
P. Gorlani, T. Kenter, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2019.

OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes
T. Kenter, G. Mahale, S. Alhaddad, Y. Grynko, C. Schmitt, A. Afzal, F. Hannig, J. Förstner, C. Plessl, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018.

Automated Code Acceleration Targeting Heterogeneous OpenCL Devices
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, in: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018.

Flexible FPGA design for FDTD using OpenCL
T. Kenter, J. Förstner, C. Plessl, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017.

Reconfigurable Accelerators in the World of General-Purpose Computing
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing, Universität Paderborn, 2016.

Microdisk Cavity FDTD Simulation on FPGA using OpenCL
T. Kenter, C. Plessl, in: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC), 2016.

Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, Computers and Electrical Engineering 55 (2016) 91–111.

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.

Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract)
T. Kenter, G.F. Vaz, H. Riebler, C. Plessl, in: Workshop on Reconfigurable Computing (WRC), 2016.