M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, pp. 1–1, 2016.
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. D. Micheli, E. Sanchez, and M. S. Reorda, “A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors,” ACM Journal on Emerging Technologies in Computing Systems, pp. 1–13, 2016.
LibreCat: /record/15879
DOI: 10.1145/2988234

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires,” IEEE Transactions on Nanotechnology, vol. 14, no. 6, pp. 1117–1126, 2015.
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, and M. S. Reorda, “On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors,” in 2015 IEEE Computer Society Annual Symposium on VLSI, 2015, pp. 491–496.
LibreCat: /record/10771
DOI: 10.1109/ISVLSI.2015.13

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Fault modeling in controllable polarity silicon nanowire circuits,” in Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition, 2015, pp. 453–458.
LibreCat: /record/10772
DOI: 10.7873/DATE.2015.0428

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection,” in 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2014, pp. 163–168.
LibreCat: /record/10773
DOI: 10.1109/NANOARCH.2014.6880479

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “A fast TCAD-based methodology for Variation analysis of emerging nano-devices,” in 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2013, pp. 83–88.
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

P.-E. Gaillardon, H. Ghasemzadeh Mohammadi, and G. De Micheli, “Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study,” in 2013 14th Latin American Test Workshop-LATW, 2013, pp. 1–6.
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

M. Khatir, H. Ghasemzadeh Mohammadi, and A. Ejlali, “Sub-threshold charge recovery circuits,” in Computer Design (ICCD), 2010 IEEE International Conference on, 2010, pp. 138–144.
LibreCat: /record/10776
DOI: 10.1109/ICCD.2010.5647815

H. Ghasemzadeh Mohammadi, S. G. Miremadi, and A. Ejlali, “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors,” in Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, 2009, pp. 252–255.
LibreCat: /record/10777
DOI: 10.1109/PRDC.2009.69

H. Ghasemzadeh Mohammadi, H. Tabkhi, S. G. Miremadi, and A. Ejlali, “A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic,” in 2008 International Conference on Microelectronics, 2008, pp. 444–447.
LibreCat: /record/10778
DOI: 10.1109/ICM.2008.5393497