Awais, Muhammad, et al. “An MCTS-Based Framework for Synthesis of Approximate Circuits.”10.1109/VLSI-SoC.2018.8645026__26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–24, doi:10.1109/VLSI-SoC.2018.8645026.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

Ghasemzadeh Mohammadi, Hassan, et al. “Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation.”10.1109/TCAD.2016.2547908__IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, IEEE, 2016, pp. 1–1, doi:10.1109/TCAD.2016.2547908.
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

Ghasemzadeh Mohammadi, Hassan, et al. “A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors.”10.1145/2988234__ACM Journal on Emerging Technologies in Computing Systems, 2016, pp. 1–13, doi:10.1145/2988234.
LibreCat: /record/15879
DOI: 10.1145/2988234

Ghasemzadeh Mohammadi, Hassan, et al. “From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires.”10.1109/TNANO.2015.2482359__IEEE Transactions on Nanotechnology, vol. 14, no. 6, IEEE, 2015, pp. 1117–26, doi:10.1109/TNANO.2015.2482359.
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

Ghasemzadeh Mohammadi, Hassan, et al. “On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors.”10.1109/ISVLSI.2015.13__2015 IEEE Computer Society Annual Symposium on VLSI, IEEE, 2015, pp. 491–96, doi:10.1109/ISVLSI.2015.13.
LibreCat: /record/10771
DOI: 10.1109/ISVLSI.2015.13

Ghasemzadeh Mohammadi, Hassan, et al. “Fault Modeling in Controllable Polarity Silicon Nanowire Circuits.”10.7873/DATE.2015.0428__Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition, EDA Consortium, 2015, pp. 453–58, doi:10.7873/DATE.2015.0428.
LibreCat: /record/10772
DOI: 10.7873/DATE.2015.0428

Ghasemzadeh Mohammadi, Hassan, et al. “Fast Process Variation Analysis in Nano-Scaled Technologies Using Column-Wise Sparse Parameter Selection.”10.1109/NANOARCH.2014.6880479__2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), IEEE, 2014, pp. 163–68, doi:10.1109/NANOARCH.2014.6880479.
LibreCat: /record/10773
DOI: 10.1109/NANOARCH.2014.6880479

Ghasemzadeh Mohammadi, Hassan, et al. “A Fast TCAD-Based Methodology for Variation Analysis of Emerging Nano-Devices.”10.1109/DFT.2013.6653587__2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88, doi:10.1109/DFT.2013.6653587.
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

Gaillardon, Pierre-Emmanuel, et al. “Vertically-Stacked Silicon Nanowire Transistors with Controllable Polarity: A Robustness Study.”10.1109/LATW.2013.6562673__2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1–6, doi:10.1109/LATW.2013.6562673.
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

Khatir, Mehrdad, et al. “Sub-Threshold Charge Recovery Circuits.”10.1109/ICCD.2010.5647815__Computer Design (ICCD), 2010 IEEE International Conference On, IEEE, 2010, pp. 138–44, doi:10.1109/ICCD.2010.5647815.
LibreCat: /record/10776
DOI: 10.1109/ICCD.2010.5647815

Ghasemzadeh Mohammadi, Hassan, et al. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.”10.1109/PRDC.2009.69__Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–55, doi:10.1109/PRDC.2009.69.
LibreCat: /record/10777
DOI: 10.1109/PRDC.2009.69

Ghasemzadeh Mohammadi, Hassan, et al. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.”10.1109/ICM.2008.5393497__2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–47, doi:10.1109/ICM.2008.5393497.
LibreCat: /record/10778
DOI: 10.1109/ICM.2008.5393497