C. Bauer et al., “Noctua 2 Supercomputer,”10.17815/jlsrf-8-187 __Journal of large-scale research facilities, vol. 9, 2024, doi:10.17815/jlsrf-8-187  .
LibreCat: /record/53663
DOI: 10.17815/jlsrf-8-187 

L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.
LibreCat: /record/43439
arXiv: 2304.03039

T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat: /record/45893
DOI: 10.5281/zenodo.8068642

H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL,” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, pp. 14:1–14:26, 2019.
LibreCat: /record/7689
DOI: 10.1145/3319423

H. Riebler, Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. 2019.
LibreCat: /record/34167
DOI: 10.17619/UNIPB/1-830

H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,”10.1145/3178487.3178534__2018, doi:10.1145/3178487.3178534 .
LibreCat: /record/1204
DOI: 10.1145/3178487.3178534

H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,”10.1145/3053687__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, p. 24:1-24:23, 2017, doi:10.1145/3053687 .
LibreCat: /record/18
DOI: 10.1145/3053687

H. Riebler, G. F. Vaz, C. Plessl, E. M. G. Trainiti, G. C. Durelli, and C. Bolchini, “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” 2016.
LibreCat: /record/31

H. Riebler et al., “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,”10.1109/RTSI.2016.7740545__in Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 2016, pp. 1–5, doi:10.1109/RTSI.2016.7740545 .
LibreCat: /record/138
DOI: 10.1109/RTSI.2016.7740545

G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,”10.1016/j.compeleceng.2016.04.021__Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi:10.1016/j.compeleceng.2016.04.021 .
LibreCat: /record/165
DOI: 10.1016/j.compeleceng.2016.04.021

T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
LibreCat: /record/171

M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,”10.7873/DATE.2015.1124__in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi:10.7873/DATE.2015.1124 .
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,”10.1109/FCCM.2014.67__in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi:10.1109/FCCM.2014.67 .
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,”10.1109/ISPA.2014.27__in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi:10.1109/ISPA.2014.27 .
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,”10.1109/ReConFig.2014.7032509__in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509 .
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509

H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.
LibreCat: /record/521

H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University, 2013.
LibreCat: /record/10730

H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,”10.1109/FPT.2013.6718394__in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi:10.1109/FPT.2013.6718394 .
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394