60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design
B. Sadiye, M. Iftekhar, W. Müller, J.C. Scheytt, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2025).

A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology
M. Iftekhar, B. Sadiye, W. Müller, J.C. Scheytt, in: IEEE Nordic Circuits and Systems Conference (NORCAS), 2025.