Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL
O. Gadewar, Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL, Universität Paderborn, 2018.

Sprint diagnostic with GPS and inertial sensor fusion
J.C. Mertens, A. Boschmann, M. Schmidt, C. Plessl, Sports Engineering 21 (2018) 441–451.

Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate it on FPGA Platform
T. Filmwala, Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate It on FPGA Platform, Universität Paderborn, 2018.

Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots
M. Lass, T. Kühne, C. Plessl, Embedded Systems Letters 10 (2018) 33–36.

Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.

Flexible FPGA design for FDTD using OpenCL
T. Kenter, J. Förstner, C. Plessl, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017.

High-Throughput and Low-Latency Network Communication with NetIO
J. Schumacher, C. Plessl, W. Vandelli, Journal of Physics: Conference Series 898 (2017).

Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension
M. Lass, D. Leibenger, C. Sorge, in: Proc. 41st Conference on Local Computer Networks (LCN), IEEE, 2016.

Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment
G. Wüllrich, Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment, Universität Paderborn, 2016.

Microdisk Cavity FDTD Simulation on FPGA using OpenCL
T. Kenter, C. Plessl, in: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC), 2016.

Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract)
T. Kenter, G.F. Vaz, H. Riebler, C. Plessl, in: Workshop on Reconfigurable Computing (WRC), 2016.

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.

Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, Computers and Electrical Engineering 55 (2016) 91–111.

Reconfigurable Accelerators in the World of General-Purpose Computing
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing, Universität Paderborn, 2016.

ReconOS
A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: D. Koch, F. Hannig, D. Ziener (Eds.), FPGAs for Software Programmers, Springer International Publishing, Cham, 2016, pp. 227–244.

Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.

Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung
C. Tölke, Sicherheit von Hybriden FPGA-Systemen in Der Industriellen Automatisierungstechnik -- Anforderungen Und Umsetzung, Universität Paderborn, 2016.

Using Approximate Computing in Scientific Codes
M. Lass, T. Kühne, C. Plessl, in: Workshop on Approximate Computing (AC), 2016.

Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, C. Bolchini, in: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.

Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, E. Del Sozzo, M.D. Santambrogio, C. Bolchini, in: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5.