Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.”10.1109/ISORC.2013.6913232__Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.”10.1109/IPDPSW.2013.136__Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136.
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.”10.1109/FPT.2013.6718394__Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394.
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.”10.1109/SIU.2013.6531530__Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013, doi:10.1109/SIU.2013.6531530.
LibreCat: /record/1786
DOI: 10.1109/SIU.2013.6531530

Graf, Tobias, et al. “On Semeai Detection in Monte-Carlo Go.” Proceedings of the International Conference on Computers and Games (CG), Springer, 2013.
LibreCat: /record/13645

Toebermann, Christian, et al. “Real-Time Simulation of Distribution Grids with High Penetration of Regenerative and Distributed Generation.” Real-Time Conference, OPAL RT Paris, 2013.
LibreCat: /record/10745

Ghasemzadeh Mohammadi, Hassan, et al. “A Fast TCAD-Based Methodology for Variation Analysis of Emerging Nano-Devices.”10.1109/DFT.2013.6653587__2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88, doi:10.1109/DFT.2013.6653587.
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

Gaillardon, Pierre-Emmanuel, et al. “Vertically-Stacked Silicon Nanowire Transistors with Controllable Polarity: A Robustness Study.”10.1109/LATW.2013.6562673__2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1–6, doi:10.1109/LATW.2013.6562673.
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

Boschmann, Alexander, et al. “Improving Transient State Myoelectric Signal Recognition in Hand Movement Classification Using Gyroscopes.” Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
LibreCat: /record/10634

Boschmann, Alexander, and Marco Platzner. “Reducing the Limb Position Effect in Pattern Recognition Based Myoelectric Control Using a High Density Electrode Array.” Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
LibreCat: /record/10635

Glette, Kyrre, et al. “Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 1, Springer, 2013, pp. 1–1.
LibreCat: /record/10655

Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.”10.1109/ReConFig.2013.6732280__Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6, doi:10.1109/ReConFig.2013.6732280.
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.”10.1109/HPCSim.2012.6266973__Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.”10.1109/ReConFig.2012.6416745__Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.”10.1109/FPL.2012.6339370__Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370.
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat: /record/609

Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?”10.1109/ReConFig.2012.6416773__Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat: /record/2180

Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?”10.1109/FPL.2012.6339370__Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370.
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation of an Approximate Polynomial Matrix EVD Algorithm.”10.1109/FPT.2012.6412125__Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–40, doi:10.1109/FPT.2012.6412125.
LibreCat: /record/2097
DOI: 10.1109/FPT.2012.6412125

Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” Int. Architecture and Engineering Symp. (ARCHENG), 2012.
LibreCat: /record/2100

Wistuba, Martin, et al. “Comparison of Bayesian Move Prediction Systems for Computer Go.”10.1109/CIG.2012.6374143__Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99, doi:10.1109/CIG.2012.6374143.
LibreCat: /record/2103
DOI: 10.1109/CIG.2012.6374143

Boschmann, Alexander, and Marco Platzner. “Reducing Classification Accuracy Degradation of Pattern Recognition Based Myoelectric Control Caused by Electrode Shift Using a High Density Electrode Array.” Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat: /record/10636

Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.”10.1109/ReConFig.2011.59__Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59.
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.”10.1145/1950413.1950448__Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448.
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.”10.1109/IPDPS.2011.153__Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–85, doi:10.1109/IPDPS.2011.153.
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.”10.1109/SAAHPC.2011.12__Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.”10.1109/ASAP.2011.6043273__Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–26, doi:10.1109/ASAP.2011.6043273.
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Drzevitzky, Stephanie, and Marco Platzner. “Achieving Hardware Security for Reconû01gurable Systems on Chip by a Proof-Carrying Code Approach.”10.1109/ReCoSoC.2011.5981499__Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65, doi:10.1109/ReCoSoC.2011.5981499.
LibreCat: /record/666
DOI: 10.1109/ReCoSoC.2011.5981499

Graf, Tobias, et al. “Parallel Monte-Carlo Tree Search for HPC Systems.”10.1007/978-3-642-23397-5_36__Proc. European Conf. on Parallel Processing (Euro-Par), vol. 6853, Springer, 2011, doi:10.1007/978-3-642-23397-5_36.
LibreCat: /record/2204
DOI: 10.1007/978-3-642-23397-5_36

Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.” Intel European Research and Innovation Conference, 2011.
LibreCat: /record/2191

Agne, Andreas, et al. “Memory Virtualization for Multithreaded Reconfigurable Hardware.”10.1109/fpl.2011.42__Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2011, pp. 185–88, doi:10.1109/fpl.2011.42.
LibreCat: /record/13643
DOI: 10.1109/fpl.2011.42

Henkel, Jörg, et al. “Design and Architectures for Dependable Embedded Systems.”10.1145/2039370.2039384__Proceedings of the Seventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis - CODES+ISSS ’11, 2011, doi:10.1145/2039370.2039384.
LibreCat: /record/13644
DOI: 10.1145/2039370.2039384

Boschmann, Alexander, et al. “Accurate Gait Phase Detection Using Surface Electromyographic Signals and Support Vector Machines.” Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
LibreCat: /record/10637

Boschmann, Alexander, et al. “Development of a Pattern Recognition-Based Myoelectric Transhumeral Prosthesis with Multifunctional Simultaneous Control Using a Model-Driven Ppproach for Mechatronic Systems.” Proc. MyoElectric Controls Symposium (MEC), 2011.
LibreCat: /record/10638

Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.”10.1109/GLOCOMW.2010.5700341__Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.
LibreCat: /record/2206
DOI: 10.1109/GLOCOMW.2010.5700341

Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
LibreCat: /record/2228

Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.”10.1109/ASAP.2010.5540798__Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.
LibreCat: /record/2226
DOI: 10.1109/ASAP.2010.5540798

Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.
LibreCat: /record/2224

Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31.
LibreCat: /record/2223

Plaks, Toomas P., et al., editors. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat: /record/2222

Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
LibreCat: /record/2220

Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.”10.1109/ReConFig.2010.19__Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19.
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

Giefers, Heiner, and Marco Platzner. “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.” Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2010.
LibreCat: /record/13640

Schäfer, Wilhelm, et al. “Engineering Self-Coordinating Software Intensive Systems.” Proceedings of the Foundations of Software Engineering (FSE) and NITR &; D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–24.
LibreCat: /record/13641

Giefers, Heiner, and Marco Platzner. “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.” Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
LibreCat: /record/13642

Khatir, Mehrdad, et al. “Sub-Threshold Charge Recovery Circuits.”10.1109/ICCD.2010.5647815__Computer Design (ICCD), 2010 IEEE International Conference On, IEEE, 2010, pp. 138–44, doi:10.1109/ICCD.2010.5647815.
LibreCat: /record/10776
DOI: 10.1109/ICCD.2010.5647815

Kaufmann, Paul, et al. “Fluctuating EMG Signals: Investigating Long-Term Effects of Pattern Matching Algorithms.” International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), IEEE, 2010, pp. 6357–60.
LibreCat: /record/10683

Kaufmann, Paul, et al. “A Novel Hybrid Evolutionary Strategy and Its Periodization with Multi-Objective Genetic Optimizers.” IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), IEEE, 2010, pp. 541–48.
LibreCat: /record/10686

Knieper, Tobias, et al. “Coping with Resource Fluctuations: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 6274, Springer, 2010, pp. 250–61.
LibreCat: /record/10699

Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.
LibreCat: /record/2263

Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
LibreCat: /record/2262

Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.
LibreCat: /record/2261

Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the .”10.1109/ReConFig.2009.32__Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.”10.1109/FCCM.2009.25__Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

Happe, Markus, et al. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
LibreCat: /record/13632

Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
LibreCat: /record/13634

Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
LibreCat: /record/13635

Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
LibreCat: /record/13636

Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
LibreCat: /record/13637

Happe, Markus, et al. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.”10.1109/fpt.2009.5377645__Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009, doi:10.1109/fpt.2009.5377645.
LibreCat: /record/13638
DOI: 10.1109/fpt.2009.5377645

Drzevitzky, Stephanie, et al. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
LibreCat: /record/13639

Ghasemzadeh Mohammadi, Hassan, et al. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.”10.1109/PRDC.2009.69__Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–55, doi:10.1109/PRDC.2009.69.
LibreCat: /record/10777
DOI: 10.1109/PRDC.2009.69

Boschmann, Alexander, et al. “Towards Multi-Movement Hand Prostheses: Combining Adaptive Classification with High Precision Sockets.” Proc. Technically Assisted Rehabilitation (TAR), 2009.
LibreCat: /record/10639

Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat: /record/2372

Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
LibreCat: /record/2364

Platzner, Marco, et al. “The GOmputer: Accelerating GO with FPGAs.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
LibreCat: /record/2365

Beisel, Tobias, et al. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.”10.1109/NSSMIC.2008.4774198__IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–68, doi:10.1109/NSSMIC.2008.4774198.
LibreCat: /record/2358
DOI: 10.1109/NSSMIC.2008.4774198

Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
LibreCat: /record/13629

Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
LibreCat: /record/13630

Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.”10.1109/fpl.2008.4629901__Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008, doi:10.1109/fpl.2008.4629901.
LibreCat: /record/13631
DOI: 10.1109/fpl.2008.4629901

Ghasemzadeh Mohammadi, Hassan, et al. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.”10.1109/ICM.2008.5393497__2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–47, doi:10.1109/ICM.2008.5393497.
LibreCat: /record/10778
DOI: 10.1109/ICM.2008.5393497

Glette, Kyrre, et al. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
LibreCat: /record/10653

Glette, Kyrre, et al. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 5216, Springer, 2008, pp. 22–33.
LibreCat: /record/10656

Torresen, Jim, et al. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008.
LibreCat: /record/10690

Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–26.
LibreCat: /record/10691

Knieper, Tobias, et al. “On Robust Evolution of Digital Hardware.” Biologically Inspired Collaborative Computing (BICC), vol. 268, Springer, 2008, pp. 2313–222.
LibreCat: /record/10698

Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.”10.1109/ahs.2007.73__Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–54, doi:10.1109/ahs.2007.73.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73

Giefers, Heiner, and Marco Platzner. “A Many-Core Implementation Based on the Reconfigurable Mesh Model.”10.1109/fpl.2007.4380623__Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007, doi:10.1109/fpl.2007.4380623.
LibreCat: /record/13627
DOI: 10.1109/fpl.2007.4380623

Lübbers, Enno, and Marco Platzner. “ReconOS: An RTOS Supporting Hard-and Software Threads.”10.1109/fpl.2007.4380686__Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007, doi:10.1109/fpl.2007.4380686.
LibreCat: /record/13628
DOI: 10.1109/fpl.2007.4380686

Schumacher, Tobias, et al. “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster.” Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), vol. 15, IOS Press, 2007, pp. 749–56.
LibreCat: /record/10735

Kaufmann, Paul, and Marco Platzner. “Toward Self-Adaptive Embedded Systems: Multi-Objective Hardware Evolution.” Architecture of Computing Systems (ARCS), vol. 4415, Springer, 2007, pp. 199–208.
LibreCat: /record/10689

Plessl, Christian, et al. “Optimal Temporal Partitioning Based on Slowdown and Retiming.”10.1109/FPT.2006.270344__Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–48, doi:10.1109/FPT.2006.270344.
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Danne, Klaus, et al. “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-Time Conditions.” Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
LibreCat: /record/13624

Danne, Klaus, and Marco Platzner. “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices.” In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
LibreCat: /record/13625

Danne, Klaus, and Marco Platzner. “Partitioned Scheduling of Periodic Real-Time Tasks onto Reconfigurable Hardware.” Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
LibreCat: /record/13626

Kaufmann, Paul, and Marco Platzner. “Multi-Objective Intrinsic Hardware Evolution.” Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
LibreCat: /record/10688

Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.”10.1109/ASAP.2005.69__Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–18, doi:10.1109/ASAP.2005.69.
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

Danne, Klaus, and Marco Platzner. “Periodic Real-Time Scheduling for FPGA Computers.”10.1109/wises.2005.1438720__Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005, doi:10.1109/wises.2005.1438720.
LibreCat: /record/13621
DOI: 10.1109/wises.2005.1438720

Danne, Klaus, and Marco Platzner. “Memory-Demanding Periodic Real-Time Applications on FPGA Computers.” Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
LibreCat: /record/13622

Danne, Klaus, and Marco Platzner. “A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.”10.1109/fpl.2005.1515787__Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), IEEE CS Press, 2005, doi:10.1109/fpl.2005.1515787.
LibreCat: /record/13623
DOI: 10.1109/fpl.2005.1515787

Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
LibreCat: /record/2415

Walder, Herbert, and Marco Platzner. “A Runtime Environment for Reconfigurable Hardware Operating Systems.”10.1007/978-3-540-30117-2_84__Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), Springer, 2004, pp. 831–35, doi:10.1007/978-3-540-30117-2_84.
LibreCat: /record/13618
DOI: 10.1007/978-3-540-30117-2_84

Walder, Hebert, et al. “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems.” Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004.
LibreCat: /record/13619

Dyer, Matthias, et al. “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine.”10.1109/fccm.2004.31__Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE CS Press, 2004, doi:10.1109/fccm.2004.31.
LibreCat: /record/13620
DOI: 10.1109/fccm.2004.31

Enzler, Rolf, et al. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.”10.1007/b12007__Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2778, Springer, 2003, pp. 151–60, doi:10.1007/b12007.
LibreCat: /record/2421
DOI: 10.1007/b12007

Enzler, Rolf, et al. “Co-Simulation of a Hybrid Multi-Context Architecture.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–80.
LibreCat: /record/2422

Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.”10.1109/FPT.2003.1275755__Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–59, doi:10.1109/FPT.2003.1275755.
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

Walder, Herbert, and Marco Platzner. “Online Scheduling for Block-Partitioned Reconfigurable Devices.”10.1109/date.2003.1253622__Proceedings Design, Automation and Test in Europe Conference (DATE), IEEE CS Press, 2003, pp. 290–95, doi:10.1109/date.2003.1253622.
LibreCat: /record/13612
DOI: 10.1109/date.2003.1253622

Walder, Herbert, et al. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.”10.1109/ipdps.2003.1213329__Proceedings International Parallel and Distributed Processing Symposium, IEEE CS Press, 2003, doi:10.1109/ipdps.2003.1213329.
LibreCat: /record/13613
DOI: 10.1109/ipdps.2003.1213329