Walder, Herbert, Christoph Steiger, and Marco Platzner. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.”https://doi.org/10.1109/ipdps.2003.1213329__In Proceedings International Parallel and Distributed Processing Symposium. IEEE CS Press, 2003.https://doi.org/10.1109/ipdps.2003.1213329 .

Walder, Herbert, and Marco Platzner. “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.” In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 284–87. CSREA Press, 2003.

Steiger, Christoph, Herbert Walder, and Marco Platzner. “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices.”https://doi.org/10.1007/978-3-540-45234-8_56__In Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 575–84. Berlin, Heidelberg: Springer, 2003.https://doi.org/10.1007/978-3-540-45234-8_56 .

Steiger, Christoph, Herbert Walder, Marco Platzner, and Lothar Thiele. “Online Scheduling and Placement of Real-Time Tasks to Partially Reconfigurable Devices.”https://doi.org/10.1109/real.2003.1253269__In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 252–235. IEEE CS Press, 2003.https://doi.org/10.1109/real.2003.1253269 .

Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, and Lothar Thiele. “Reconfigurable Hardware in Wearable Computing Nodes.”https://doi.org/10.1109/ISWC.2002.1167250__In Proc. Int. Symp. on Wearable Computers (ISWC), 215–22. IEEE Computer Society, 2002.https://doi.org/10.1109/ISWC.2002.1167250 .

Dyer, Matthias, Christian Plessl, and Marco Platzner. “Partially Reconfigurable Cores for Xilinx Virtex.”https://doi.org/10.1007/3-540-46117-5__In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2438:292–301. Lecture Notes in Computer Science (LNCS). Springer, 2002.https://doi.org/10.1007/3-540-46117-5 .

Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.”https://doi.org/10.1109/FPGA.2002.1106671__In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 163–72. IEEE Computer Society, 2002.https://doi.org/10.1109/FPGA.2002.1106671 .

Walder, Herbert, and Marco Platzner. “Non-Preemptive Multitasking on FPGAs: Task Placement and Footprint Transform.” In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 24–30. CSREA Press, 2002.

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 85–91. CSREA Press, 2001.

Enzler, Rolf, Marco Platzner, Christian Plessl, Lothar Thiele, and Gerhard Tröster. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.”https://doi.org/10.1117/12.434376__In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 4525:135–46. Proc. SPIE, 2001.https://doi.org/10.1117/12.434376 .

Eisenring, Michael H., and Marco Platzner. “An Implementation Framework for Run-Time Reconfigurable Systems.” In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 151–57. CSREA Press, 2000.

Eisenring, Michael, and Marco Platzner. “Optimization of Run-Time Reconfigurable Embedded Systems.” In Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 565–74. Springer, 2000.

Mencer, Oskar, and Marco Platzner. “Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.”https://doi.org/10.1109/hicss.1999.772883__In Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press, 1999.https://doi.org/10.1109/hicss.1999.772883 .

Eisenring, Michael, Marco Platzner, and Lothar Thiele. “Communication Synthesis for Reconfigurable Embedded Systems.”https://doi.org/10.1007/978-3-540-48302-1_21__In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1673:205–14. LCS. Springer, 1999.https://doi.org/10.1007/978-3-540-48302-1_21 .

Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.”https://doi.org/10.1007/bfb0055234__In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 69–78. LNCS. Berlin, Heidelberg: Springer , 1998.https://doi.org/10.1007/bfb0055234 .

Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, Vol. 3166, 1997.

Röwekamp, Thomas, Marco Platzner, and Liliane  Peters. “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP.” In Proceedings of the 8th International Conference on Signal Processing Applications &; Technology (ICSPAT), 829–33, 1997.

Lind, Erich, Marco Platzner, and Bernhard  Rinner. “A Multi-DSP System with Dynamically Reconfigurable Processors.” In Proceedings of the 7th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1996.

Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs.” In Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 311–18. IEEE CS Press, 1995.

Brenner, Eugen, Robert Ginthör-Kalcsics, Robert Hranitzky, Marco Platzner, Bernhard  Rinner, Christian  Steger, and Reinhold Weiss. “High-Performance Simulators Based on Multi-TM0.” In Proceedings of the 5th Annual Texas Instruments TM0 Educators Conference, 1995.

Friedl, Gerald, Marco Platzner, and Bernhard Rinner. “A Special-Purpose Coprocessor for Qualitative Simulation.” In Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 695–98. Springer International Publishing, 1995.

Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “Parallel Qualitative Simulation.” In Proceedings of the EUROSIM Congress, 231–36. Elsevier, 1995.

Platzner, Marco, and Bernhard Rinner. “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture.” In Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 494–501. ISCA, 1995.

Platzner, Marco, and Bernhard Rinner. “High-Performance Qualitative Simulation on a Multi-DSP Architecture.” In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

Hranitzky, Robert, and Marco Platzner. “Design and Implementation of Adaptive Digital Filters on a Multi-TM0 System.” In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

Platzner, Marco, Christian Steger, and Reinhold Weiss. “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications.” In Proceedings of the 7th Mediterranean Electrotechnical Conference. IEEE Press, 1994.

Platzner, Marco, Christian Steger, and Reinhold  Weiss. “Performance Measurements on a Multi-DSP Architecture with TM0.” In Proceedings of the 4th International Conference on Signal Processing Applications &; Technology (ICSPAT). DSP Associates, 1993.

Ginthör, Robert, Marco Platzner, and Reinhold Weiss. “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems.” In Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 45–54, 1992.