Lienen, C., Brede, M., Karger, D., Koch, K., Logan, D., Mazur, J., Nowosad, A. P., Schnelle, A., Waizy, M., &; Platzner, M. (2023). AutonomROS: A ReconROS-based Autonomous Driving Unit. 2023 Seventh IEEE International Conference on Robotic Computing (IRC).https://doi.org/10.1109/irc59093.2023.00056 

Lienen, C., Nowosad, A. P., &; Platzner, M. (n.d.). Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI).https://doi.org/10.1145/3637843.3637846 

Lienen, C., Middeke, S. H., &; Platzner, M. (2023). fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. https://doi.org/10.1109/IROS55552.2023.10341921__Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS).https://doi.org/10.1109/IROS55552.2023.10341921 

Clausing, L., Guetattfi, Z., Kaufmann, P., Lienen, C., &; Platzner, M. (2023). On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconO. Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC).https://doi.org/10.1007/978-3-031-42921-7_17 

Ahmed, Q. A., Awais, M., &; Platzner, M. (2023). MAAS: Hiding Trojans in Approximate Circuits. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA.

Ahmed, Q. A., &; Platzner, M. (2022). On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.

Lienen, C., &; Platzner, M. (n.d.). Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. 2022 25th Euromicro Conference on Digital System Design (DSD). 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain.https://doi.org/10.1109/DSD57027.2022.00088 

Hansmeier, T., Brede, M., &; Platzner, M. (2022). XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2071–2079.https://doi.org/10.1145/3520304.3533977 

Clausing, L., &; Platzner, M. (2022). ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 120–127.https://doi.org/10.1109/ipdpsw55747.2022.00029 

Lienen, C., &; Platzner, M. (n.d.). Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.

Hansmeier, T., &; Platzner, M. (2022). Integrating Safety Guarantees into the Learning Classifier System XCS. Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, 13224, 386–401.https://doi.org/10.1007/978-3-031-02462-7_25 

Witschen, L. M., Wiersema, T., Artmann, M., &; Platzner, M. (n.d.). MUSCAT: MUS-based Circuit Approximation Technique. Design, Automation and Test in Europe (DATE). Design, Automation and Test in Europe (DATE), Online.

Witschen, L. M., Wiersema, T., Reuter, L. D., &; Platzner, M. (n.d.). Search Space Characterization for Approximate Logic Synthesis . 2022 59th ACM/IEEE Design Automation Conference (DAC). 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.

Lienen, C., &; Platzner, M. (2022). ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.

Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., &; Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases.https://doi.org/10.1007/978-3-030-93736-2_27 

Clausing, L. (2021). ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies.https://doi.org/10.1145/3468044.3468056 

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE). Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France.https://doi.org/10.23919/DATE51398.2021.9474026 

Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC).https://doi.org/10.1109/vlsi-soc53125.2021.9606974 

Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online.https://doi.org/10.1145/3468044.3468055 

Hansmeier, T., &; Platzner, M. (2021). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1639–1647.https://doi.org/10.1145/3449726.3463159 

Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., &; Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, &; D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science.https://doi.org/10.1007/978-3-030-79025-7_4 

Lienen, C., &; Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. In arXiv:2107.07208.

Awais, M., &; Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM.https://doi.org/10.1145/3453688.3461506 

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 6–16.https://doi.org/10.1109/IPDPSW50202.2020.00012 

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw50202.2020.00012 

Guetttatfi, Z., Kaufmann, P., &; Platzner, M. (2020). Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC).

Gatica, C. P., &; Platzner, M. (2020). Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg.https://doi.org/10.1007/978-3-662-59084-3_9 

Witschen, L. M., Wiersema, T., &; Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).

Lienen, C., Platzner, M., &; Rinner, B. (2020). ReconROS: Flexible Hardware Acceleration for RO Applications. In Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT).

Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1756–1764.https://doi.org/10.1145/3377929.3398106 

Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM).https://doi.org/10.1145/3377929.3389968 

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2020). A Hybrid Synthesis Methodology for Approximate Circuits. In Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020 (pp. 421–426). Beijing, China: ACM.https://doi.org/10.1145/3386263.3406952 

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, &; P. Diniz (Eds.), Applied Reconfigurable Computing (Vol. 11444, pp. 127–136). Springer International Publishing.https://doi.org/10.1007/978-3-030-17227-5_10 

Guettatfi, Z., Platzner, M., Kermia, O., &; Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw.2019.00027 

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).

Ho, N., Kaufmann, P., &; Platzner, M. (2019). Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In World Congress on Nature and Biologically Inspired Computing (NaBIC). Springer.

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM.https://doi.org/10.1145/3299874.3317998 

Lösch, A., &; Platzner, M. (2018). A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Milan, Italy: IEEE.https://doi.org/10.1109/asap.2018.8445098 

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).

Lösch, A., Wiens, A., &; Platzner, M. (2018). Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) (Vol. 10793, pp. 73–84). Cham: Springer International Publishing.https://doi.org/10.1007/978-3-319-77610-1_6 

Hansmeier, T., Platzner, M., &; Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing.https://doi.org/10.1007/978-3-319-78890-6_13 

Witschen, L. M., Wiersema, T., &; Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018).

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 219–224).https://doi.org/10.1109/VLSI-SoC.2018.8645026 

Lösch, A., &; Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).https://doi.org/10.1109/ASAP.2017.7995272 

Ghribi, I., Abdallah, R. B., Khalgui, M., &; Platzner, M. (2017). I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In Communications in Computer and Information Science. Cham: Springer .https://doi.org/10.1007/978-3-319-62569-0_8 

Kaufmann, P., &; Kalkreuth, R. (2017). Parametrizing Cartesian Genetic Programming: An Empirical Study. In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing.https://doi.org/10.1007/978-3-319-67190-1_26 

Kaufmann, P., Ho, N., &; Platzner, M. (2017). Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In Adaptive Hardware and Systems (AHS). IEEE.https://doi.org/10.1109/AHS.2017.8046380 

Kaufmann, P., &; Kalkreuth, R. (2017). An Empirical Study on the Parametrization of Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO), Compendium. ACM.https://doi.org/10.1145/3067695.3075980 

Guettatfi, Z., Hübner, P., Platzner, M., &; Rinner, B. (2017). Computational self-awareness as design approach for visual sensor nodes. In 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (pp. 1–8).https://doi.org/10.1109/ReCoSoC.2017.8016147