DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: To Apear in IEEE ISVLSI 2024, 2024.
LibreCat: /record/54468

MAAS: Hiding Trojans in Approximate Circuits
Q.A. Ahmed, M. Awais, M. Platzner, in: The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.
LibreCat: /record/44194

AutonomROS: A ReconROS-based Autonomous Driving Unit
C. Lienen, M. Brede, D. Karger, K. Koch, D. Logan, J. Mazur, A.P. Nowosad, A. Schnelle, M. Waizy, M. Platzner, in: 2023 Seventh IEEE International Conference on Robotic Computing (IRC), IEEE, 2023.
LibreCat: /record/53794
DOI: 10.1109/irc59093.2023.00056

On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconO
L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, M. Platzner, in: Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC), 2023.
LibreCat: /record/45913
DOI: https://doi.org/10.1007/978-3-031-42921-7_17

Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms
C. Lienen, A.P. Nowosad, M. Platzner, in: Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI), n.d.
LibreCat: /record/46229
DOI: https://doi.org/10.1145/3637843.3637846

fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications
C. Lienen, S.H. Middeke, M. Platzner, in:  Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2023.
LibreCat: /record/43048
DOI: 10.1109/IROS55552.2023.10341921

Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML
F. Jentzsch, in: 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2023.
LibreCat: /record/53435
DOI: 10.1109/fpl60245.2023.00066

Search Space Characterization for Approximate Logic Synthesis 
L.M. Witschen, T. Wiersema, L.D. Reuter, M. Platzner, in: 2022 59th ACM/IEEE Design Automation Conference (DAC), n.d.
LibreCat: /record/29945

MUSCAT: MUS-based Circuit Approximation Technique
L.M. Witschen, T. Wiersema, M. Artmann, M. Platzner, in: Design, Automation and Test in Europe (DATE), n.d.
LibreCat: /record/29865

Integrating Safety Guarantees into the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Springer International Publishing, 2022, pp. 386–401.
LibreCat: /record/30971
DOI: 10.1007/978-3-031-02462-7_25

ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support
L. Clausing, M. Platzner, in: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–127.
LibreCat: /record/32855
DOI: 10.1109/ipdpsw55747.2022.00029

XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion
T. Hansmeier, M. Brede, M. Platzner, in: GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2022, pp. 2071–2079.
LibreCat: /record/33253
DOI: 10.1145/3520304.3533977

ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications
C. Lienen, M. Platzner, (2022).
LibreCat: /record/29541

Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS
C. Lienen, M. Platzner, in: n.d.
LibreCat: /record/34007

Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications
C. Lienen, M. Platzner, in: 2022 25th Euromicro Conference on Digital System Design (DSD), n.d.
LibreCat: /record/34005
DOI: 10.1109/DSD57027.2022.00088

On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs
Q.A. Ahmed, M. Platzner, in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), Pafos, Cyprus, 2022.
LibreCat: /record/32342

LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32.
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

MCTS-Based Synthesis Towards Efficient Approximate Accelerators
M. Awais, M. Platzner, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, IEEE, 2021, pp. 384–389.
LibreCat: /record/22309

Timing Optimization for Virtual FPGA Configurations
L.M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, M. Platzner, in: F. Hannig, S. Derrien, P. Diniz, D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Springer Lecture Notes in Computer Science, n.d.
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS
T. Hansmeier, in: HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Association for Computing Machinery (ACM), New York, NY, United States, 2021.
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055

Design of Distributed Reconfigurable Robotics Systems with ReconROS
C. Lienen, M. Platzner, ArXiv:2107.07208 (2021).
LibreCat: /record/22764

An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2021, pp. 1639–1647.
LibreCat: /record/21813
DOI: 10.1145/3449726.3463159

Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, in: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021.
LibreCat: /record/29138
DOI: 10.1109/vlsi-soc53125.2021.9606974

Malicious Routing: Circumventing Bitstream-level Verification for FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, 2021.
LibreCat: /record/20681
DOI: 10.23919/DATE51398.2021.9474026

ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip
L. Clausing, in: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2021.
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics
H. Ghasemzadeh Mohammadi, F. Jentzsch, M. Kuschel, R. Arshad, S. Rautmare, S. Manjunatha, M. Platzner, A. Boschmann, D. Schollbach, in:  Machine Learning and Principles and Practice of Knowledge Discovery in Databases, Springer, 2021.
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27

Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z.  Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
LibreCat: /record/3583

Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
C.P. Gatica, M. Platzner, in: Machine Learning for Cyber Physical Systems (ML4CPS 2017), Berlin, Heidelberg, 2020.
LibreCat: /record/21584
DOI: 10.1007/978-3-662-59084-3_9

Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).
LibreCat: /record/20748

ReconROS: Flexible Hardware Acceleration for RO Applications
C. Lienen, M. Platzner, B. Rinner, in: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
LibreCat: /record/20750

An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.
LibreCat: /record/17063
DOI: 10.1145/3377929.3398106

A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.
LibreCat: /record/16213
DOI: 10.1145/3386263.3406952

Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 125–126.
LibreCat: /record/16363
DOI: 10.1145/3377929.3389968

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.
LibreCat: /record/20838
DOI: 10.1109/ipdpsw50202.2020.00012

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020, pp. 6–16.
LibreCat: /record/35152
DOI: 10.1109/IPDPSW50202.2020.00012

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
LibreCat: /record/16853

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
LibreCat: /record/10577
DOI: 10.1145/3299874.3317998

Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
LibreCat: /record/15422

An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware
Z. Guettatfi, M. Platzner, O. Kermia, A. Khouas, in: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019.
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

An FPGA/HMC-Based Accelerator for Resolution Proof Checking
T. Hansmeier, M. Platzner, D. Andrews, in: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2018, pp. 153–165.
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).
LibreCat: /record/3586

Making the Case for Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).
LibreCat: /record/1165

A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

An MCTS-based Framework for Synthesis of Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
LibreCat: /record/65
DOI: 10.1109/ASAP.2017.7995272

A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller
A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.
LibreCat: /record/10630
DOI: 10.23919/DATE.2017.7927137

Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor
N. Ho, I.I. Ashraf, P. Kaufmann, M. Platzner, in: Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
LibreCat: /record/10672
DOI: 10.23919/DATE.2017.7927096

Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor
N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144