Awais, Muhammad, et al. “DeepApprox: Rapid Deep Learning Based Design Space Exploration of Approximate Circuits via Check-Pointing.” To Apear in IEEE ISVLSI 2024, 2024.

Jentzsch, Felix. “Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML.”10.1109/fpl60245.2023.00066__2023 33rd International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2023, doi:10.1109/fpl60245.2023.00066.

Lienen, Christian, et al. “AutonomROS: A ReconROS-Based Autonomous Driving Unit.”10.1109/irc59093.2023.00056__2023 Seventh IEEE International Conference on Robotic Computing (IRC), IEEE, 2023, doi:10.1109/irc59093.2023.00056.

Lienen, Christian, et al. “Mapping and Optimizing Communication in ROS 2-Based Applications on Configurable System-on-Chip Platforms.”https://doi.org/10.1145/3637843.3637846__Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI), doi:https://doi.org/10.1145/3637843.3637846.

Lienen, Christian, et al. “FpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications.”10.1109/IROS55552.2023.10341921__10.1109/IROS55552.2023.10341921__Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2023, doi:10.1109/IROS55552.2023.10341921.

Clausing, Lennart, et al. “On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks under ReconO.”https://doi.org/10.1007/978-3-031-42921-7_17__Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC), 2023, doi:https://doi.org/10.1007/978-3-031-42921-7_17.

Ahmed, Qazi Arbab, et al. “MAAS: Hiding Trojans in Approximate Circuits.” The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.

Ahmed, Qazi Arbab, and Marco Platzner. On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), 2022.

Lienen, Christian, and Marco Platzner. “Event-Driven Programming of FPGA-Accelerated ROS 2 Robotics Applications.”10.1109/DSD57027.2022.00088__2022 25th Euromicro Conference on Digital System Design (DSD), doi:10.1109/DSD57027.2022.00088.

Hansmeier, Tim, et al. “XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion.”10.1145/3520304.3533977__GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), 2022, pp. 2071–79, doi:10.1145/3520304.3533977.

Clausing, Lennart, and Marco Platzner. “ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support.”10.1109/ipdpsw55747.2022.00029__2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–27, doi:10.1109/ipdpsw55747.2022.00029.

Lienen, Christian, and Marco Platzner. Task Mapping for Hardware-Accelerated Robotics Applications Using ReconROS.

Hansmeier, Tim, and Marco Platzner. “Integrating Safety Guarantees into the Learning Classifier System XCS.”10.1007/978-3-031-02462-7_25__Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, vol. 13224, Springer International Publishing, 2022, pp. 386–401, doi:10.1007/978-3-031-02462-7_25.

Witschen, Linus Matthias, et al. “MUSCAT: MUS-Based Circuit Approximation Technique.” Design, Automation and Test in Europe (DATE).

Witschen, Linus Matthias, et al. “Search Space Characterization for Approximate Logic Synthesis .” 2022 59th ACM/IEEE Design Automation Conference (DAC).

Lienen, Christian, and Marco Platzner. ReconROS Executor: Event-Driven Programming of FPGA-Accelerated ROS 2 Applications. 2022.

Ghasemzadeh Mohammadi, Hassan, et al. “FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics.”https://doi.org/10.1007/978-3-030-93736-2_27__https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases, Springer, 2021, doi:https://doi.org/10.1007/978-3-030-93736-2_27.

Clausing, Lennart. “ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip.”10.1145/3468044.3468056__Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2021, doi:10.1145/3468044.3468056.

Ahmed, Qazi Arbab, et al. “Malicious Routing: Circumventing Bitstream-Level Verification for FPGAs.”10.23919/DATE51398.2021.9474026__2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), 2021, doi:10.23919/DATE51398.2021.9474026.

Ahmed, Qazi Arbab. “Hardware Trojans in Reconfigurable Computing.”10.1109/vlsi-soc53125.2021.9606974__2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021, doi:10.1109/vlsi-soc53125.2021.9606974.

Hansmeier, Tim. “Self-Aware Operation of Heterogeneous Compute Nodes Using the Learning Classifier System XCS.”10.1145/3468044.3468055__HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Association for Computing Machinery (ACM), 2021, doi:10.1145/3468044.3468055.

Hansmeier, Tim, and Marco Platzner. “An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS.”10.1145/3449726.3463159__GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), 2021, pp. 1639–1647, doi:10.1145/3449726.3463159.

Witschen, Linus Matthias, et al. “Timing Optimization for Virtual FPGA Configurations.”10.1007/978-3-030-79025-7_4__Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), edited by Frank Hannig et al., Springer Lecture Notes in Computer Science, doi:10.1007/978-3-030-79025-7_4.

Lienen, Christian, and Marco Platzner. “Design of Distributed Reconfigurable Robotics Systems with ReconROS.” ArXiv:2107.07208, 2021.

Awais, Muhammad, and Marco Platzner. “MCTS-Based Synthesis Towards Efficient Approximate Accelerators.” Proceedings of IEEE Computer Society Annual Symposium on VLSI, IEEE, 2021, pp. 384–89.

Awais, Muhammad, et al. “LDAX: A Learning-Based Fast Design Space Exploration Framework for Approximate Circuit Synthesis.”https://doi.org/10.1145/3453688.3461506__Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32, doi:https://doi.org/10.1145/3453688.3461506.

Lösch, Achim, and Marco Platzner. “MigHEFT: DAG-Based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes.”10.1109/IPDPSW50202.2020.00012__2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020, pp. 6–16, doi:10.1109/IPDPSW50202.2020.00012.

Lösch, Achim, and Marco Platzner. “MigHEFT: DAG-Based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes.”10.1109/ipdpsw50202.2020.00012__2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020, doi:10.1109/ipdpsw50202.2020.00012.

Guetttatfi, Zakarya, et al. “Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices.” Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.

Gatica, Carlos Paiz, and Marco Platzner. “Adaptable Realization of Industrial Analytics Functions on Edge-Devices Using Reconfigurable Architectures.”10.1007/978-3-662-59084-3_9__Machine Learning for Cyber Physical Systems (ML4CPS 2017), 2020, doi:10.1007/978-3-662-59084-3_9.

Witschen, Linus Matthias, et al. “Search Space Characterization for AxC Synthesis.” Fifth Workshop on Approximate Computing (AxC 2020).

Lienen, Christian, et al. “ReconROS: Flexible Hardware Acceleration for RO Applications.” Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.

Hansmeier, Tim, et al. “An Adaption Mechanism for the Error Threshold of XCSF.”10.1145/3377929.3398106__GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), 2020, pp. 1756–64, doi:10.1145/3377929.3398106.

Hansmeier, Tim, et al. “Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold.”10.1145/3377929.3389968__GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), 2020, pp. 125–26, doi:10.1145/3377929.3389968.

Awais, Muhammad, et al. “A Hybrid Synthesis Methodology for Approximate Circuits.”10.1145/3386263.3406952__Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–26, doi:10.1145/3386263.3406952.

Ahmed, Qazi Arbab, et al. “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.”10.1007/978-3-030-17227-5_10__Applied Reconfigurable Computing, edited by Christian Hochberger et al., vol. 11444, Springer International Publishing, 2019, pp. 127–36, doi:10.1007/978-3-030-17227-5_10.

Guettatfi, Zakarya, et al. “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware.”10.1109/ipdpsw.2019.00027__2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019, doi:10.1109/ipdpsw.2019.00027.

Witschen, Linus Matthias, et al. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.” Fourth Workshop on Approximate Computing (AxC 2019).

Ho, Nam, et al. “Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor.” World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.

Witschen, Linus Matthias, et al. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.”10.1145/3299874.3317998__Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, 2019, doi:10.1145/3299874.3317998.

Lösch, Achim, and Marco Platzner. “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes.”10.1109/asap.2018.8445098__2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018, doi:10.1109/asap.2018.8445098.

Witschen, Linus Matthias, et al. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” Third Workshop on Approximate Computing (AxC 2018).

Lösch, Achim, et al. “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes.”10.1007/978-3-319-77610-1_6__Proceedings of the International Conference on Architecture of Computing Systems (ARCS), vol. 10793, Springer International Publishing, 2018, pp. 73–84, doi:10.1007/978-3-319-77610-1_6.

Hansmeier, Tim, et al. “An FPGA/HMC-Based Accelerator for Resolution Proof Checking.”10.1007/978-3-319-78890-6_13__ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, vol. 10824, Springer International Publishing, 2018, pp. 153–65, doi:10.1007/978-3-319-78890-6_13.

Witschen, Linus Matthias, et al. “Making the Case for Proof-Carrying Approximate Circuits.” 4th Workshop On Approximate Computing (WAPCO 2018), 2018.

Awais, Muhammad, et al. “An MCTS-Based Framework for Synthesis of Approximate Circuits.”10.1109/VLSI-SoC.2018.8645026__26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–24, doi:10.1109/VLSI-SoC.2018.8645026.

Lösch, Achim, and Marco Platzner. “ReMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements.”10.1109/ASAP.2017.7995272__Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017, doi:10.1109/ASAP.2017.7995272.

Ghribi, Ines, et al. “I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems.”10.1007/978-3-319-62569-0_8__Communications in Computer and Information Science, Springer , 2017, doi:10.1007/978-3-319-62569-0_8.

Kaufmann, Paul, and Roman Kalkreuth. “Parametrizing Cartesian Genetic Programming: An Empirical Study.”10.1007/978-3-319-67190-1_26__KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, Springer International Publishing, 2017, doi:10.1007/978-3-319-67190-1_26.

Kaufmann, Paul, et al. “Evaluation Methodology for Complex Non-Deterministic Functions: A Case Study in Metaheuristic Optimization of Caches.”10.1109/AHS.2017.8046380__Adaptive Hardware and Systems (AHS), IEEE, 2017, doi:10.1109/AHS.2017.8046380.