Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2024). Post-configuration Activation of Hardware Trojans in FPGAs. Journal of Hardware and Systems Security.https://doi.org/10.1007/s41635-024-00147-5 
LibreCat: /record/52686
DOI: 10.1007/s41635-024-00147-5

Jentzsch, F., Umuroglu, Y., Pappalardo, A., Blott, M., &; Platzner, M. (2022). RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro, 42(6), 125–133.https://doi.org/10.1109/MM.2022.3202091 
LibreCat: /record/33990
DOI: 10.1109/MM.2022.3202091

Jakobs, M.-C., Pauck, F., Platzner, M., Wehrheim, H., &; Wiersema, T. (2021). Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access.https://doi.org/10.1109/ACCESS.2021.3131213 
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

Rodriguez, A., Otero, A., Platzner, M., &; De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1.https://doi.org/10.1109/tc.2021.3107196 
LibreCat: /record/30907
DOI: 10.1109/tc.2021.3107196

Boschmann, A., Neuhaus, D., Vogt, S., Kaltschmidt, C., Platzner, M., &; Dosen, S. (2021). Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation, 18(1), Article 25.https://doi.org/10.1186/s12984-021-00822-6 
LibreCat: /record/30906
DOI: 10.1186/s12984-021-00822-6

Lienen, C., &; Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems, 1–20.https://doi.org/10.1145/3494571 
LibreCat: /record/29150
DOI: 10.1145/3494571

Witschen, L. M., Wiersema, T., &; Platzner, M. (2020). Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems, 28(9), 2084–2088.https://doi.org/10.1109/TVLSI.2020.3008061 
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

Ho, N., Kaufmann, P., &; Platzner, M. (2020). Evolution of Application-Specific Cache Mappings. International Journal of Hybrid Intelligent Systems.
LibreCat: /record/17369

Anwer, J., Meisner, S., &; Platzner, M. (2020). Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing, 1–19.https://doi.org/10.1155/2020/2808710 
LibreCat: /record/17092
DOI: 10.1155/2020/2808710

Bellman, K., Dutt, N., Esterle, L., Herkersdorf, A., Jantsch, A., Landauer, C.,  Tammemäe, K. (2020). Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, Accepted for Publication, 1–24.
LibreCat: /record/15836

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (2019). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability, 99, 277–290.https://doi.org/10.1016/j.microrel.2019.04.003 
LibreCat: /record/3585
DOI: 10.1016/j.microrel.2019.04.003

Hansmeier, T., Platzner, M., Pantho, M. J. H., &; Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272.https://doi.org/10.1007/s11265-018-1435-y 
LibreCat: /record/12967
DOI: 10.1007/s11265-018-1435-y

Boschmann, A., Agne, A., Thombansen, G., Witschen, L. M., Kraus, F., &; Platzner, M. (2019). Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing, 123, 77–89.https://doi.org/10.1016/j.jpdc.2018.07.004 
LibreCat: /record/11950
DOI: 10.1016/j.jpdc.2018.07.004

Ghribi, I., Abdallah, R. B., Khalgui, M., Li, Z., Alnowibet, K., &; Platzner, M. (2018). R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access, 14078–14092.https://doi.org/10.1109/access.2018.2799852 
LibreCat: /record/12965
DOI: 10.1109/access.2018.2799852

Isenberg, T., Platzner, M., Wehrheim, H., &; Wiersema, T. (2017). Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems, (4), 61:1--61:23.https://doi.org/10.1145/3054743 
LibreCat: /record/68
DOI: 10.1145/3054743

Shen, C., Kaufmann, P., &; Braun, M. (2017). Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering, 19pp.https://doi.org/10.1049/joe.2017.0032 
LibreCat: /record/10740
DOI: 10.1049/joe.2017.0032

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES).
LibreCat: /record/10692

H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O.,https://doi.org/10.1145/2996468__Wang, Y. (2017). The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems.https://doi.org/10.1145/2996468 
LibreCat: /record/10600
DOI: 10.1145/2996468

F. DeMara, R., Platzner, M., &; Ottavi, M. (2017). Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing.https://doi.org/10.1109/TETC.2016.2641599 
LibreCat: /record/10601
DOI: 10.1109/TETC.2016.2641599

Anwer, J., &; Platzner, M. (2017). Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems, 160–172.https://doi.org/10.1016/j.micpro.2017.06.002 
LibreCat: /record/10611
DOI: 10.1016/j.micpro.2017.06.002

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 94, 287–299.https://doi.org/10.1016/j.ijepes.2017.07.007 
LibreCat: /record/9919
DOI: 10.1016/j.ijepes.2017.07.007

Wiersema, T., Bockhorn, A., &; Platzner, M. (2016). An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers &; Electrical Engineering, 112--122.https://doi.org/10.1016/j.compeleceng.2016.04.005 
LibreCat: /record/222
DOI: 10.1016/j.compeleceng.2016.04.005

Ma, C., Kaufmann, P., Töbermann, J.-C., &; Braun, M. (2016). Optimal Generation Dispatch of Distributed Generators Considering Fair Contribution to Grid Voltage Control. Renewable Energy, 87((part 2)), 946–953.https://doi.org/10.1016/j.renene.2015.07.083 
LibreCat: /record/10705
DOI: 10.1016/j.renene.2015.07.083

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2016). Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, PP(99), 1–1.https://doi.org/10.1109/TCAD.2016.2547908 
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

Graf, T., &; Platzner, M. (2016). Adaptive playouts for online learning of policies during Monte Carlo Tree Search. Journal Theoretical Computer Science, 644, 53–62.https://doi.org/10.1016/j.tcs.2016.06.029 
LibreCat: /record/10661
DOI: 10.1016/j.tcs.2016.06.029

Plessl, C., Platzner, M., &; Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, 5, 396–399.https://doi.org/10.1007/s00287-015-0911-z 
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 
LibreCat: /record/296
DOI: 10.1155/2015/859425

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205 
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2015). From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires. IEEE Transactions on Nanotechnology, 14(6), 1117–1126.https://doi.org/10.1109/TNANO.2015.2482359 
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

Giefers, H., Plessl, C., &; Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70.https://doi.org/10.1145/2641361.2641372 
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.https://doi.org/10.1145/2617596 
LibreCat: /record/365
DOI: 10.1145/2617596

Agne, A., Hangmann, H., Happe, M., Platzner, M., &; Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919.https://doi.org/10.1016/j.micpro.2013.12.001 
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &; Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71.https://doi.org/10.1109/MM.2013.110 
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

Schaefers, L., &; Platzner, M. (2014). A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games, 6(3), 361–374.https://doi.org/10.1109/TCIAIG.2014.2346997 
LibreCat: /record/10602
DOI: 10.1109/TCIAIG.2014.2346997

Giefers, H., &; Platzner, M. (2014). An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers, 63(12), 2919–2932.https://doi.org/10.1109/TC.2013.174 
LibreCat: /record/10603
DOI: 10.1109/TC.2013.174

Kasap, S., &; Redif, S. (2013). Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 22(3), 522–536.https://doi.org/10.1109/TVLSI.2013.2248069 
LibreCat: /record/1792
DOI: 10.1109/TVLSI.2013.2248069

Kaufmann, P., Glette, K., Gruber, T., Platzner, M., Torresen, J., &; Sick, B. (2013). Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Transactions on Evolutionary Computation, 17(1), 46–63.https://doi.org/10.1109/TEVC.2012.2185845 
LibreCat: /record/10684
DOI: 10.1109/TEVC.2012.2185845

Happe, M., Lübbers, E., &; Platzner, M. (2013). A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. International Journal of Real-Time Image Processing, 8(1), 95–110.https://doi.org/doi:10.1007/s11554-011-0212-y 
LibreCat: /record/10604
DOI: doi:10.1007/s11554-011-0212-y

Grad, M., &; Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC).https://doi.org/10.1155/2012/418315 
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Schumacher, T., Plessl, C., &; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126.https://doi.org/10.1016/j.micpro.2011.04.002 
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Thielemans, K., Tsoumpas, C., Mustafovic, S., Beisel, T., Aguiar, P., Dikaios, N., &; W Jacobson, M. (2012). STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology, 57(4), 867–883.https://doi.org/10.1088/0031-9155/57/4/867 
LibreCat: /record/2172
DOI: 10.1088/0031-9155/57/4/867

Redif, S., &; Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651.https://doi.org/10.1080/00207217.2012.751343 
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Kasap, S., &; Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.
LibreCat: /record/2174

Kaufmann, P., Glette, K., Platzner, M., &; Torresen, J. (2012). Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 17–31.https://doi.org/10.4018/jaras.2012100102 
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

Schumacher, T., Süß, T., Plessl, C., &; Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC).https://doi.org/10.1155/2011/760954 
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Kebschull, U., Platzner, M., &; Teich, J. (2010). Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial). IET Computers Digital Techniques, 4(3), 157–158.https://doi.org/10.1049/iet-cdt.2010.9044 
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

Drzevitzky, S., Kastens, U., &; Platzner, M. (2010). Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. International Journal of Reconfigurable Computing, 2010.https://doi.org/10.1155/2010/180242 
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Lübbers, E., &; Platzner, M. (2009). ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems, 9(1), 8:1-8:33.https://doi.org/10.1145/1596532.1596540 
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Danne, K., Mühlenbernd, R., &; Platzner, M. (2007). Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques, 1(4), 295–302.https://doi.org/10.1049/iet-cdt:20060186 
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

Bergmann, N., Platzner, M., &; Teich, J. (2007). Dynamically Reconfigurable Architectures (editorial). EURASIP Journal on Embedded Systems, 2007, 1–2.https://doi.org/10.1155/2007/28405 
LibreCat: /record/10625
DOI: 10.1155/2007/28405

Enzler, R., Plessl, C., &; Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73.https://doi.org/10.1016/j.micpro.2004.06.004 
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Steiger, C., Walder, H., &; Platzner, M. (2004). Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks. IEEE Transactions on Computers, 53(11), 1393–1407.https://doi.org/10.1109/tc.2004.99 
LibreCat: /record/10742
DOI: 10.1109/tc.2004.99

Plessl, C., &; Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129.https://doi.org/10.1023/a:1024443416592 
LibreCat: /record/2420
DOI: 10.1023/a:1024443416592

Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., &; Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308.https://doi.org/10.1007/s00779-003-0243-x 
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x

Eisenring, M., &; Platzner, M. (2002). A Framework for Run-time Reconfigurable Systems. The Journal of Supercomputing, 21(2), 145–159.https://doi.org/10.1023/a:1013627403946 
LibreCat: /record/10651
DOI: 10.1023/a:1013627403946

Mencer, O., Platzner, M., Morf, M., &; J. Flynn, M. (2001). Object-oriented domain specific compilers for programming FPGAs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 9(1), 205–210.https://doi.org/10.1109/92.920835 
LibreCat: /record/10713
DOI: 10.1109/92.920835

Platzner, M. (2000). Reconfigurable accelerators for combinatorial problems. Computer, 33(4), 58–60.https://doi.org/10.1109/2.839322 
LibreCat: /record/6507
DOI: 10.1109/2.839322

Platzner, M., Rinner, B., &; Weiss, R. (2000). Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems, 15(2), 62–68.https://doi.org/10.1109/5254.850829 
LibreCat: /record/10725
DOI: 10.1109/5254.850829

Eisenring, M., &; Platzner, M. (2000). Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers &; Digital Techniques, 147, 159–165.https://doi.org/10.1049/ip-cdt:20000496 
LibreCat: /record/10606
DOI: 10.1049/ip-cdt:20000496

Platzner, M. (1998). Reconfigurable Computer Architectures. E&;i Elektrotechnik Und Informationstechnik, 115, 143–148.
LibreCat: /record/10607

Platzner, M., &; Rinner, B. (1998). Design and Implementation of a Parallel Constraint Satisfaction Algorithm. International Journal of Computers &; Their Applications, 5, 106–116.
LibreCat: /record/10608

Platzner, M., Rinner, B., &; Weiss, R. (1997). Parallel qualitative simulation. Simulation Practice and Theory, 5(7–8), 623–638.https://doi.org/10.1016/s0928-4869(97)00008-6 
LibreCat: /record/10724
DOI: 10.1016/s0928-4869(97)00008-6

Platzner, M., Rinner, B., &; Weiss, R. (1997). A Computer Architecture to Support Qualitative Simulation in Industrial Applications. E &; i Elektrotechnik Und Informationstechnik, 114, 13–18.
LibreCat: /record/10609

Platzner, M., Rinner, B., &; Weiss, R. (1995). Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J.UCS Journal of Universal Computer Science, 12, 811–820.
LibreCat: /record/10610

Platzner, M., &; Steger, C. (1993). Erfahrungen mit einer Multi-Signalprozessorarchitektur (TM0). Mikroelektronik.
LibreCat: /record/13466