Jafarzadeh, Hanieh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Time and Space Optimized Storage-Based BIST under Multiple Voltages and Variations.” In European Test Symposium, The Hague, Netherlands, May 20-24, 2024, 6. IEEE, n.d.
LibreCat: /record/52744

Jafarzadeh, Hanieh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Vmin Testing under Variations: Defect vs. Fault Coverage.” In IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, 6. IEEE, n.d.
LibreCat: /record/52742

Hellebrand, Sybille, Somayeh Sadeghi-Kohan, and Hans-Joachim Wunderlich. “Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle.” In International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, 1, n.d.
LibreCat: /record/52743

Wunderlich, Hans-Joachim, Hanieh Jafarzadeh, and Sybille Hellebrand. “Robust Test of Small Delay Faults under  PVT-Variations.” In International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, 1, n.d.
LibreCat: /record/52745

Stiballe, Alisa, Jan Dennis Reimer, Somayeh Sadeghi-Kohan, and Sybille Hellebrand. Modeling Crosstalk-Induced Interconnect Delay with Polynomial Regression. Darmstadt, Germany: 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”  (TuZ’24), Feb. 2024, 2024.
LibreCat: /record/50284

Ustimova, Magdalina , Somayeh Sadeghi-Kohan, and Sybille Hellebrand. Crosstalk-Aware Simulation of Interconnects Using Artificial Neural Networks. Darmstadt, Germany: 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”  (TuZ’24), Feb. 2024, 2024.
LibreCat: /record/51799

Ghazal, Abdulkarim, Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. On Cryptography Effects on Interconnect Reliability. Erfurt, Germany: 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, 2023.
LibreCat: /record/35204

Badran, Abdalrhman , Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. “Approximate Computing: Balancing Performance, Power, Reliability, and Safety.” In 28th IEEE European Test Symposium (ETS’23), May 2023. Venice, Italy, 2023.
LibreCat: /record/41875

Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication.”https://doi.org/10.1109/dsn-w58399.2023.00056__In 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W). IEEE, 2023.https://doi.org/10.1109/dsn-w58399.2023.00056 .
LibreCat: /record/46739
DOI: 10.1109/dsn-w58399.2023.00056

Sadeghi-Kohan, Somayeh, Jan Dennis Reimer, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Optimizing the Streaming of Sensor Data with Approximate Communication.” In IEEE Asian Test Symposium (ATS’23), October 2023. Beijing, China, 2023.
LibreCat: /record/46738

Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Workload-Aware Periodic Interconnect BIST.”https://doi.org/10.1109/mdat.2023.3298849__IEEE Design &;Test, 2023, 1–1.https://doi.org/10.1109/mdat.2023.3298849 .
LibreCat: /record/46264
DOI: 10.1109/mdat.2023.3298849

Jafarzadeh, Hanieh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi Haghi, Hussam  Amrouch, Sybille Hellebrand, and Hans-Joachim  Wunderlich. “Robust Pattern Generation for Small Delay Faults under Process Variations.” In IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023. Anaheim, CA, USA: IEEE, 2023.
LibreCat: /record/45830

Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Stress-Aware Periodic Test of Interconnects.”https://doi.org/10.1007/s10836-021-05979-5__Journal of Electronic Testing, 2022.https://doi.org/10.1007/s10836-021-05979-5 .
LibreCat: /record/29351
DOI: 10.1007/s10836-021-05979-5

Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. EM-Aware Interconnect BIST. Online: European Workshop on Silicon Lifecycle Management, March 18, 2022, 2022.
LibreCat: /record/29890

Sprenger, Alexander, Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy, 2020.
LibreCat: /record/19422

Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. Ludwigsburg: 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, 2020.
LibreCat: /record/15419

Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects.”https://doi.org/10.1109/vts48691.2020.9107591__In 38th IEEE VLSI Test Symposium (VTS). Virtual Conference - Originally San Diego, CA, USA: IEEE, 2020.https://doi.org/10.1109/vts48691.2020.9107591 .
LibreCat: /record/29200
DOI: 10.1109/vts48691.2020.9107591

Holst, Stefan, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, and Xiaoqing Weng. “Logic Fault Diagnosis of Hidden Delay Defects.” In IEEE International Test Conference (ITC’20), November 2020. Virtual Conference - Originally Washington, DC, USA, 2020.
LibreCat: /record/19421

Maaz, Mohammad Urf, Alexander Sprenger, and Sybille Hellebrand. A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat: /record/8112

Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.”https://doi.org/10.1142/s0218126619400012__Journal of Circuits, Systems and Computers 28, no. 1 (2019): 1–23.https://doi.org/10.1142/s0218126619400012 .
LibreCat: /record/8667
DOI: 10.1142/s0218126619400012

Kampmann, Matthias, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Built-in Test for Hidden Delay Faults.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 38, no. 10 (2019): 1956–68.
LibreCat: /record/13048

Maaz, Mohammad Urf, Alexander Sprenger, and Sybille Hellebrand. “A Hybrid Space Compactor for Adaptive X-Handling.” In 50th IEEE International Test Conference (ITC), 1–8. Washington, DC, USA: IEEE, 2019.
LibreCat: /record/12918

Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat: /record/4576

Hellebrand, Sybille, Joerg Henkel, Anand Raghunathan, and Hans-Joachim Wunderlich. “Guest Editors’ Introduction - Special Issue on Approximate Computing.”https://doi.org/10.1109/les.2018.2789942__IEEE Embedded Systems Letters 10, no. 1 (2018): 1–1.https://doi.org/10.1109/les.2018.2789942 .
LibreCat: /record/12974
DOI: 10.1109/les.2018.2789942

Kampmann, Matthias, and Sybille Hellebrand. “Design For Small Delay Test - A Simulation Study.” Microelectronics Reliability 80 (2018): 124–33.
LibreCat: /record/13057

Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.”https://doi.org/10.1109/ddecs.2018.00020__In 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &; Systems (DDECS). Budapest, Hungary: IEEE, 2018.https://doi.org/10.1109/ddecs.2018.00020 .
LibreCat: /record/4575
DOI: 10.1109/ddecs.2018.00020

Liu, Chang, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.”https://doi.org/10.1109/ats.2018.00028__In 27th IEEE Asian Test Symposium (ATS’18), 2018.https://doi.org/10.1109/ats.2018.00028 .
LibreCat: /record/10575
DOI: 10.1109/ats.2018.00028

Deshmukh, Jyotirmoy, Wolfgang Kunz, Hans-Joachim Wunderlich, and Sybille Hellebrand. “Special Session on Early Life Failures.”https://doi.org/10.1109/vts.2017.7928933__In 35th IEEE VLSI Test Symposium (VTS’17). Caesars Palace, Las Vegas, Nevada, USA: IEEE, 2017.https://doi.org/10.1109/vts.2017.7928933 .
LibreCat: /record/12973
DOI: 10.1109/vts.2017.7928933

Kampmann, Matthias, and Sybille Hellebrand. X-Tolerante Prüfzellengruppierung Für Den Test Mit Erhöhter Betriebsfrequenz. 29. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’17), Lübeck, Germany, 2017.
LibreCat: /record/13078

Kampmann, Matthias, and Sybille Hellebrand. “Design-for-FAST: Supporting X-Tolerant Compaction during Faster-than-at-Speed Test.”https://doi.org/10.1109/ddecs.2017.7934564__In 20th IEEE International Symposium on Design &; Diagnostics of Electronic Circuits &; Systems (DDECS’17). IEEE, 2017.https://doi.org/10.1109/ddecs.2017.7934564 .
LibreCat: /record/10576
DOI: 10.1109/ddecs.2017.7934564

Kampmann, Matthias, and Sybille Hellebrand. “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test.”https://doi.org/10.1109/ats.2016.20__In 25th IEEE Asian Test Symposium (ATS’16), 1–6. Hiroshima, Japan: IEEE, 2016.https://doi.org/10.1109/ats.2016.20 .
LibreCat: /record/12975
DOI: 10.1109/ats.2016.20

Kampmann, Matthias, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Optimized Selection of Frequencies for Faster-Than-at-Speed Test.”https://doi.org/10.1109/ats.2015.26__In 24th IEEE Asian Test Symposium (ATS’15), 109–14. Mumbai, India: IEEE, 2015.https://doi.org/10.1109/ats.2015.26 .
LibreCat: /record/12976
DOI: 10.1109/ats.2015.26

Huang, Zhengfeng, Huaguo Liang, and Sybille Hellebrand. “A High Performance SEU Tolerant Latch.” Journal of Electronic Testing - Theory and Applications (JETTA) 31, no. 4 (2015): 349–59.
LibreCat: /record/13056

Hellebrand, Sybille, Thomas Indlekofer, Matthias Kampmann, Michael Kochte, Chang Liu, and Hans-Joachim Wunderlich. Effiziente Auswahl von Testfrequenzen Für Den Test Kleiner Verzögerungsfehler. 27. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’15), Bad Urach, Germany, 2015.
LibreCat: /record/13077

Hellebrand, Sybille, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, and Hans-Joachim Wunderlich. “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects.”https://doi.org/10.1109/test.2014.7035360__In IEEE International Test Conference (ITC’14). Seattle, Washington, USA: IEEE, 2014.https://doi.org/10.1109/test.2014.7035360 .
LibreCat: /record/12977
DOI: 10.1109/test.2014.7035360

Hellebrand, Sybille, and Hans-Joachim Wunderlich. “SAT-Based ATPG beyond Stuck-at Fault Testing.” DeGruyter Journal on Information Technology (It) 56, no. 4 (2014): 165–72.
LibreCat: /record/13054

Rodriguez Gomez, Laura, Alejandro Cook, Thomas Indlekofer, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Adaptive Bayesian Diagnosis of Intermittent Faults.” Journal of Electronic Testing - Theory and Applications (JETTA) 30, no. 5 (2014): 527–40.
LibreCat: /record/13055

Hellebrand, Sybille. “Analyzing and Quantifying Fault Tolerance Properties.”https://doi.org/10.1109/latw.2013.6562662__In 14th IEEE Latin American Test Workshop - (LATW’13). Cordoba, Argentina: IEEE, 2013.https://doi.org/10.1109/latw.2013.6562662 .
LibreCat: /record/12979
DOI: 10.1109/latw.2013.6562662

Cook, Alejandro, Laura Rodriguez Gomez, Sybille Hellebrand, Thomas Indlekofer, and Hans-Joachim Wunderlich. Adaptive Test and Diagnosis of Intermittent Faults. 14th Latin American Test Workshop, Cordoba, Argentina, 2013.
LibreCat: /record/13075

Cook, Alejandro, Sybille Hellebrand, Michael E. Imhof, Abdullah Mumtaz, and Hans-Joachim Wunderlich. “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test.”https://doi.org/10.1109/latw.2012.6261229__In 13th IEEE Latin American Test Workshop (LATW’12), 1–4. Quito, Ecuador: IEEE, 2012.https://doi.org/10.1109/latw.2012.6261229 .
LibreCat: /record/12980
DOI: 10.1109/latw.2012.6261229

Cook, Alejandro, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test.”https://doi.org/10.1109/ets.2012.6233025__In 17th IEEE European Test Symposium (ETS’12), 1–6. Annecy, France: IEEE, 2012.https://doi.org/10.1109/ets.2012.6233025 .
LibreCat: /record/12981
DOI: 10.1109/ets.2012.6233025

Cook, Alejandro, Sybille Hellebrand, and Hans-Joachim Wunderlich. Eingebaute Selbstdiagnose Mit Zufälligen Und Deterministischen Mustern. 24. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’12), Cottbus, Germany, 2012.
LibreCat: /record/13074

Cook, Alejandro, Sybille Hellebrand, Thomas Indlekofer, and Hans-Joachim Wunderlich. “Diagnostic Test of Robust Circuits.”https://doi.org/10.1109/ats.2011.55__In 20th IEEE Asian Test Symposium (ATS’11), 285–90. New Delhi, India: IEEE, 2011.https://doi.org/10.1109/ats.2011.55 .
LibreCat: /record/12982
DOI: 10.1109/ats.2011.55

Polian, Ilia, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, and Peter Maxwell. “Towards Variation-Aware Test Methods.”https://doi.org/10.1109/ets.2011.51__In 16th IEEE European Test Symposium Trondheim (ETS’11). Trondheim, Norway: IEEE, 2011.https://doi.org/10.1109/ets.2011.51 .
LibreCat: /record/12984
DOI: 10.1109/ets.2011.51

Cook, Alejandro, Sybille Hellebrand, Thomas Indlekofer, and Hans-Joachim Wunderlich. “Robuster Selbsttest Mit Diagnose.” In 5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf,” 48–53. Hamburg, Germany, 2011.
LibreCat: /record/13053

Hopsch, Fabian, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Variation-Aware Fault Modeling.” SCIENCE CHINA Information Sciences, Science China Press, Co-Published with Springer 54, no. 4 (2011): 1813–26.
LibreCat: /record/13052

Fröse, Viktor, Rüdiger Ibers, and Sybille Hellebrand. Testdatenkompression Mit Hilfe Der Netzwerkinfrastruktur. 22. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’10), Paderborn, Germany, 2010.
LibreCat: /record/10670

Becker, Bernd, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.”https://doi.org/10.1109/dsnw.2010.5542612__In 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10). Chicago, IL, USA: IEEE, 2010.https://doi.org/10.1109/dsnw.2010.5542612 .
LibreCat: /record/12987
DOI: 10.1109/dsnw.2010.5542612

Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 81–88. Wildbad Kreuth, Germany, 2010.
LibreCat: /record/13051

Hellebrand, Sybille. Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180, 2010.
LibreCat: /record/13073

Hopsch, Fabian, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Variation-Aware Fault Modeling.”https://doi.org/10.1109/ats.2010.24__In 19th IEEE Asian Test Symposium (ATS’10), 87–93. Shanghai, China: IEEE, 2010.https://doi.org/10.1109/ats.2010.24 .
LibreCat: /record/12983
DOI: 10.1109/ats.2010.24

Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.”https://doi.org/10.1109/iccd.2010.5647648__In 28th IEEE International Conference on Computer Design (ICCD’10), 480–85. Amsterdam, The Netherlands: IEEE, 2010.https://doi.org/10.1109/iccd.2010.5647648 .
LibreCat: /record/12985
DOI: 10.1109/iccd.2010.5647648

Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.”https://doi.org/10.1109/dft.2010.19__In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), 101–8. Kyoto, Japan: IEEE, 2010.https://doi.org/10.1109/dft.2010.19 .
LibreCat: /record/12986
DOI: 10.1109/dft.2010.19

Froese, Viktor, Rüdiger Ibers, and Sybille Hellebrand. “Reusing NoC-Infrastructure for Test Data Compression.”https://doi.org/10.1109/vts.2010.5469570__In 28th IEEE VLSI Test Symposium (VTS’10), 227–31. Santa Cruz, CA, USA: IEEE, 2010.https://doi.org/10.1109/vts.2010.5469570 .
LibreCat: /record/12988
DOI: 10.1109/vts.2010.5469570

Becker, Bernd, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” In 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper). Chicago, IL, USA, 2010.
LibreCat: /record/13049

Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Robuster Selbsttest Mit Extremer Kompaktierung.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 17–24. Wildbad Kreuth, Germany, 2010.
LibreCat: /record/13050

Hunger, Marc, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, and Bernd Becker. “ATPG-Based Grading of Strong Fault-Secureness.”https://doi.org/10.1109/iolts.2009.5196027__In 15th IEEE International On-Line Testing Symposium (IOLTS’09. Sesimbra-Lisbon, Portugal: IEEE, 2009.https://doi.org/10.1109/iolts.2009.5196027 .
LibreCat: /record/12991
DOI: 10.1109/iolts.2009.5196027

Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?”https://doi.org/10.1109/dft.2009.28__In 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), 77. Chicago, IL, USA: IEEE, 2009.https://doi.org/10.1109/dft.2009.28 .
LibreCat: /record/12990
DOI: 10.1109/dft.2009.28

Hunger, Marc, Sybille Hellebrand, Alexander Czutro, Ilia Polian, and Bernd Becker. “Robustheitsanalyse Stark Fehlersicherer Schaltungen Mit SAT-Basierter Testmustererzeugung.” In 3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Stuttgart, Germany, 2009.
LibreCat: /record/13030

Coym, Torsten, Sybille Hellebrand, Stefan Ludwig, Bernd Straube, Hans-Joachim Wunderlich, and Christian G. Zoellin. Ein Verfeinertes Elektrisches Modell Für Teilchentreffer Und Dessen Auswirkung Auf Die Bewertung Der Schaltungsempfindlichkeit. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (Poster), Wien, Österreich, 2008.
LibreCat: /record/13033

Amgalan, Uranmandakh, Christian Hachmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. Testen Mit Rücksetzpunkten - Ein Ansatz Zur Verbesserung Der Ausbeute Bei Robusten Schaltungen. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Wien, Österreich, 2008.
LibreCat: /record/13035

Oehler, Philipp, Alberto Bosio, Giorgio di Natale, and Sybille Hellebrand. “A Modular Memory BIST for Optimized Memory Repair.”https://doi.org/10.1109/iolts.2008.30__In 14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster). Rhodos, Greece: IEEE, 2008.https://doi.org/10.1109/iolts.2008.30 .
LibreCat: /record/12992
DOI: 10.1109/iolts.2008.30

Amgalan, Uranmandakh, Christian Hachmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Signature Rollback - A Technique for Testing Robust Circuits.”https://doi.org/10.1109/vts.2008.34__In 26th IEEE VLSI Test Symposium (VTS’08), 125–30. San Diego, CA, USA: IEEE, 2008.https://doi.org/10.1109/vts.2008.34 .
LibreCat: /record/12994
DOI: 10.1109/vts.2008.34

Hunger, Marc, and Sybille Hellebrand. “Verification and Analysis of Self-Checking Properties through ATPG.”https://doi.org/10.1109/iolts.2008.32__In 14th IEEE International On-Line Testing Symposium (IOLTS’08). Rhodos, Greece: IEEE, 2008.https://doi.org/10.1109/iolts.2008.32 .
LibreCat: /record/12993
DOI: 10.1109/iolts.2008.32

Hunger, Marc, and Sybille Hellebrand. “Analyse Selbstprüfender Schaltungen – Nachweis von Fehlersicherheit Und Selbsttestbarkeit Mit ATPG.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
LibreCat: /record/13031

Oehler, Philipp, Alberto Bosio, Giorgio Di Natale, and Sybille Hellebrand. “Modularer Selbsttest Und Optimierte Reparaturanalyse.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
LibreCat: /record/13032

Hellebrand, Sybille. Reliable Nanoscale Systems - Challenges and Strategies for On- and Offline Testing. 5th IEEE East-West Design \'26; Test Symposium, Yerevan, Armenia (Invited Talk), 2007.
LibreCat: /record/13038

Ali, Muhammad, Michael Welzl, Sven Hessler, and Sybille Hellebrand. An End-to-End Reliability Protocol to Address Transient Faults in Network on Chips. DATE 2007 Friday Workshop on Diagnostic Services in Network-on-Chips, Nice, France, (Poster), 2007.
LibreCat: /record/13039

Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. An Integrated Built-in Test and Repair Approach for Memories with 2D Redundancy. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Erlangen, Germany, 2007.
LibreCat: /record/13042

Hellebrand, Sybille. Qualitätssicherung Für Nanochips - Wie IT-Produkte Zuverlässig Werden. ForschungsForum Paderborn, 10. Ausgabe, Paderborn, Germany, 2007.
LibreCat: /record/13043

Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “A Refined Electrical Model for Particle Strikes and Its Impact on SEU Prediction.”https://doi.org/10.1109/dft.2007.43__In 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), 50–58. Rome, Italy: IEEE, 2007.https://doi.org/10.1109/dft.2007.43 .
LibreCat: /record/12995
DOI: 10.1109/dft.2007.43

Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair.”https://doi.org/10.1109/ddecs.2007.4295278__In 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), 185–90. Krakow, Poland: IEEE, 2007.https://doi.org/10.1109/ddecs.2007.4295278 .
LibreCat: /record/12996
DOI: 10.1109/ddecs.2007.4295278

Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.”https://doi.org/10.1109/ets.2007.10__In 12th IEEE European Test Symposium (ETS’07), 91–96. Freiburg, Germany: IEEE, 2007.https://doi.org/10.1109/ets.2007.10 .
LibreCat: /record/12997
DOI: 10.1109/ets.2007.10

Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” In 43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM’07), (Invited Paper). Bled, Slovenia, 2007.
LibreCat: /record/13037

Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” Informacije MIDEM, Ljubljana (Invited Paper) 37, no. 4 (124) (2007): 212–19.
LibreCat: /record/13036

Ali, Muhammad, Sven Hessler, Michael Welzl, and Sybille Hellebrand. “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip.” International Journal on High Performance Systems Architecture 1, no. 2 (2007): 113–23.
LibreCat: /record/13044

Ali, Muhammad, Michael Welzl, Sven Hessler, and Sybille Hellebrand. “A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip.” In 4th International Conference on Information Technology: New Generations (ITNG’07), 1027–32. Las Vegas, Nevada, USA, 2007.
LibreCat: /record/13040

Becker, Bernd, Ilia Polian, Sybille Hellebrand, Bernd Straube, and Hans-Joachim Wunderlich. “Test Und Zuverlässigkeit Nanoelektronischer Systeme.” In 1. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Munich, Germany, 2007.
LibreCat: /record/13041

Becker, Bernd, Ilia Polian, Sybille Hellebrand, Bernd Straube, and Hans-Joachim Wunderlich. “DFG-Projekt RealTest - Test Und Zuverlässigkeit Nanoelektronischer Systeme.” It - Information Technology 48, no. 5 (2006): 305–11.
LibreCat: /record/13045

Ali, Muhammad, Michael Welzl, and Sybille Hellebrand. Dynamic Routing: A Prerequisite for Reliable NoCs. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
LibreCat: /record/13101

Oehler, Philipp, and Sybille Hellebrand. Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
LibreCat: /record/13102

Ali, Muhammad, Michael Welzl, Martin Zwicknagl, and Sybille Hellebrand. “Considerations for Fault-Tolerant Networks on Chips.”https://doi.org/10.1109/icm.2005.1590063__In IEEE International Conference on Microelectronics (ICM’05). Islamabad, Pakistan: IEEE, 2005.https://doi.org/10.1109/icm.2005.1590063 .
LibreCat: /record/12999
DOI: 10.1109/icm.2005.1590063

Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.”https://doi.org/10.1109/ets.2005.28__In 10th IEEE European Test Symposium (ETS’05), 148–53. Tallinn, Estonia: IEEE, 2005.https://doi.org/10.1109/ets.2005.28 .
LibreCat: /record/13000
DOI: 10.1109/ets.2005.28

Ali, Muhammad, Michael Welzl, and Sybille Hellebrand. “A Dynamic Routing Mechanism for Network on Chip.”https://doi.org/10.1109/norchp.2005.1596991__In 23rd IEEE NORCHIP Conference, 70–73. Oulu, Finland: IEEE, 2005.https://doi.org/10.1109/norchp.2005.1596991 .
LibreCat: /record/12998
DOI: 10.1109/norchp.2005.1596991

Breu, Ruth, Thomas Fahringer, Dieter Fensel, Sybille Hellebrand, Aart Middeldorp, and Otmar Scherzer. Im Westen Viel Neues - Informatik an Der Universität Innsbruck. OCG Journal, pp. 28-29, 2004.
LibreCat: /record/13099

Hellebrand, Sybille, Armin Wuertenberger, and Christofer S. Tautermann. Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. 9th IEEE European Test Symposium, Ajaccio, Corsica, France, 2004.
LibreCat: /record/13100

Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections.”https://doi.org/10.1109/test.2004.1387357__In IEEE International Test Conference (ITC’04), 926–35. Charlotte, NC, USA: IEEE, 2004.https://doi.org/10.1109/test.2004.1387357 .
LibreCat: /record/13001
DOI: 10.1109/test.2004.1387357

Breu, Ruth, Sybille Hellebrand, and Michael Welzl. Experiences from Teaching Software Development in a Java Environment. Handouts ACS/IEEE Workshop on Practice and Experience with Java in Education, Tunis, Tunisia, 2003.
LibreCat: /record/13098

Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “A Hybrid Coding Strategy for Optimized Test Data Compression.”https://doi.org/10.1109/test.2003.1270870__In IEEE International Test Conference (ITC’03), 451–59. Charlotte, NC, USA: IEEE, 2003.https://doi.org/10.1109/test.2003.1270870 .
LibreCat: /record/13002
DOI: 10.1109/test.2003.1270870

Hellebrand, Sybille, and Armin Wuertenberger. Alternating Run-Length Coding: A Technique for Improved Test Data Compression. IEEE International Workshop on Test Resource Partitioning, Baltimore, MD, USA, 2002.
LibreCat: /record/13097

Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Efficient Online and Offline Testing of Embedded DRAMs.”https://doi.org/10.1109/tc.2002.1017700__IEEE Transactions on Computers 51, no. 7 (2002): 801–9.https://doi.org/10.1109/tc.2002.1017700 .
LibreCat: /record/13003
DOI: 10.1109/tc.2002.1017700

Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.” Journal of Electronic Testing - Theory and Applications (JETTA) 18, no. 2 (2002): 157–68.
LibreCat: /record/13069

Liang, Huaguo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “A Mixed-Mode BIST Scheme Based on Folding Compression.” Journal on Computer Science and Technology 17, no. 2 (2002): 203–12.
LibreCat: /record/13070

Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. IEEE European Test Workshop, Stockholm, Sweden, 2001.
LibreCat: /record/13096

Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.”https://doi.org/10.1109/test.2001.966712__In IEEE International Test Conference (ITC’01), 894–902. Baltimore, MD, USA: IEEE, 2001.https://doi.org/10.1109/test.2001.966712 .
LibreCat: /record/13004
DOI: 10.1109/test.2001.966712

Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Deterministic BIST Scheme Based on Reseeding of Folding Counters.” Journal of Computer Research and Development, (Jisuanji Yanjiu Yu Fazhan) 38, no. 8 (2001): 931.
LibreCat: /record/13047

Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” Journal of Electronic Testing - Theory and Applications (JETTA) 17, no. 3/4 (2001): 341–49.
LibreCat: /record/13068

Hellebrand, Sybille, and Hans-Joachim Wunderlich. Hardwarepraktikum Im Diplomstudiengang Informatik. Handbuch Lehre, Berlin, Raabe Verlag, 2000.
LibreCat: /record/13094

Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal, 2000.
LibreCat: /record/13095

Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.”https://doi.org/10.1109/test.2000.894274__In IEEE International Test Conference (ITC’00), 778–84. Atlantic City, NJ, USA: IEEE, 2000.https://doi.org/10.1109/test.2000.894274 .
LibreCat: /record/13005
DOI: 10.1109/test.2000.894274