M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing,” presented at the IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee, USA, 2024.

A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, and M. Platzner, “Flexible Industrial Analytics on Reconfigurable Systems-On-Chip,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 225–236.

M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis,” in Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, Virtual, 2021, pp. 27–32.

H. Ghasemzadeh Mohammadi et al., “FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics,”https://doi.org/10.1007/978-3-030-93736-2_27__2021, doi:https://doi.org/10.1007/978-3-030-93736-2_27 .

M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “A Hybrid Synthesis Methodology for Approximate Circuits,” in Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, Beijing, China, 2020, pp. 421–426.

H. Ghasemzadeh Mohammadi et al., “DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms,”10.1109/etfa46521.2020.9211880__2020, doi:10.1109/etfa46521.2020.9211880 .

L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Microelectronics Reliability, vol. 99, pp. 277–290, 2019.

L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” Fourth Workshop on Approximate Computing (AxC 2019). .

L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, Tysons Corner, VA, USA, 2019.

L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Third Workshop on Approximate Computing (AxC 2018). .

M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, pp. 1–1, 2016.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. D. Micheli, E. Sanchez, and M. S. Reorda, “A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors,” ACM Journal on Emerging Technologies in Computing Systems, pp. 1–13, 2016.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires,” IEEE Transactions on Nanotechnology, vol. 14, no. 6, pp. 1117–1126, 2015.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, and M. S. Reorda, “On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors,” in 2015 IEEE Computer Society Annual Symposium on VLSI, 2015, pp. 491–496.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Fault modeling in controllable polarity silicon nanowire circuits,” in Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition, 2015, pp. 453–458.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection,” in 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2014, pp. 163–168.

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “A fast TCAD-based methodology for Variation analysis of emerging nano-devices,” in 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2013, pp. 83–88.

P.-E. Gaillardon, H. Ghasemzadeh Mohammadi, and G. De Micheli, “Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study,” in 2013 14th Latin American Test Workshop-LATW, 2013, pp. 1–6.

M. Khatir, H. Ghasemzadeh Mohammadi, and A. Ejlali, “Sub-threshold charge recovery circuits,” in Computer Design (ICCD), 2010 IEEE International Conference on, 2010, pp. 138–144.

H. Ghasemzadeh Mohammadi, S. G. Miremadi, and A. Ejlali, “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors,” in Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, 2009, pp. 252–255.

H. Ghasemzadeh Mohammadi, H. Tabkhi, S. G. Miremadi, and A. Ejlali, “A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic,” in 2008 International Conference on Microelectronics, 2008, pp. 444–447.