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Ramaswami, Arjun. Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA. Universität Paderborn, 2018.
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Luk, Samuel M. H., et al. “Theory of Optically Controlled Anisotropic Polariton Transport in Semiconductor Double Microcavities.”10.1364/josab.35.000146__Journal of the Optical Society of America B, vol. 35, no. 1, 146, 2018, doi:10.1364/josab.35.000146.
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Kenter, Tobias, et al. “OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.”10.1109/FCCM.2018.00037__Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018, doi:10.1109/FCCM.2018.00037.
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Lass, Michael, et al. “A Massively Parallel Algorithm for the Approximate Calculation of Inverse P-Th Roots of Large Sparse Matrices.”10.1145/3218176.3218231__Proc. Platform for Advanced Scientific Computing (PASC) Conference, ACM, 2018, doi:10.1145/3218176.3218231.
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Riebler, Heinrich, et al. “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices.”10.1145/3178487.3178534__Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018, doi:10.1145/3178487.3178534.
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Riebler, Heinrich, et al. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.”10.1145/3053687__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, Association for Computing Machinery (ACM), 2017, p. 24:1-24:23, doi:10.1145/3053687.
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Kenter, Tobias, et al. “Flexible FPGA Design for FDTD Using OpenCL.”10.23919/FPL.2017.8056844__Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017, doi:10.23919/FPL.2017.8056844.
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Schumacher, Jörn, et al. “High-Throughput and Low-Latency Network Communication with NetIO.”10.1088/1742-6596/898/8/082003__Journal of Physics: Conference Series, vol. 898, 082003, IOP Publishing, 2017, doi:10.1088/1742-6596/898/8/082003.
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Steinle, Tobias. Modeling and Simulation of Metallic, Particle-Damped Spheres for Lightweight Materials. 2016.
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Dellnitz, Michael, et al. “Multiobjective Optimal Control Methods for the Development of an Intelligent Cruise Control.”10.1007/978-3-319-23413-7_87__Progress in Industrial Mathematics at ECMI, vol. 22, Springer International Publishing, 2016, pp. 633–41, doi:10.1007/978-3-319-23413-7_87.
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Lass, Michael, et al. “Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension.”10.1109/lcn.2016.11__Proc. 41st Conference on Local Computer Networks (LCN), IEEE, 2016, doi:10.1109/lcn.2016.11.
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Tölke, Christian. Sicherheit von Hybriden FPGA-Systemen in Der Industriellen Automatisierungstechnik -- Anforderungen Und Umsetzung. Universität Paderborn, 2016.
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Wüllrich, Gunnar. Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment. Universität Paderborn, 2016.
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Kenter, Tobias. Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn, 2016.
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Agne, Andreas, et al. “ReconOS.”10.1007/978-3-319-26408-0_13__FPGAs for Software Programmers, edited by Dirk Koch et al., Springer International Publishing, 2016, pp. 227–44, doi:10.1007/978-3-319-26408-0_13.
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Riebler, Heinrich, et al. “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems.” Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
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Kenter, Tobias, and Christian Plessl. “Microdisk Cavity FDTD Simulation on FPGA Using OpenCL.” Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC), 2016.
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Lass, Michael, et al. “Using Approximate Computing in Scientific Codes.” Workshop on Approximate Computing (AC), 2016.
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Riebler, Heinrich, et al. “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems.”10.1109/RTSI.2016.7740545__Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5, doi:10.1109/RTSI.2016.7740545.
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Agne, Andreas, et al. “Self-Aware Compute Nodes.”10.1007/978-3-319-39675-0_8__Self-Aware Computing Systems, Springer International Publishing, 2016, pp. 145–65, doi:10.1007/978-3-319-39675-0_8.
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Vaz, Gavin Francis, et al. “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code.”10.1016/j.compeleceng.2016.04.021__Computers and Electrical Engineering, vol. 55, Elsevier, 2016, pp. 91–111, doi:10.1016/j.compeleceng.2016.04.021.
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Lösch, Achim, et al. “Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center.” Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–17.
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Kenter, Tobias, et al. “Opportunities for Deferring Application Partitioning and Accelerator Synthesis to Runtime (Extended Abstract).” Workshop on Reconfigurable Computing (WRC), 2016.
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Hegler, Sebastian, et al. “Simulative Ultraschall-Untersuchung von Pitch-Catch-Messanordnungen Für Große Zylindrische Stahl-Prüflinge Und Gradientenbasierte Bildgebung.”doi:10.1515/teme-2015-0031__Tm - Technisches Messen, vol. 82, no. 9, Walter de Gruyter, 2015, pp. 440–50, doi:doi:10.1515/teme-2015-0031.
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Torresen, Jim, et al. “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction.”10.1109/MC.2015.205__IEEE Computer, vol. 48, no. 7, IEEE Computer Society, 2015, pp. 18–20, doi:10.1109/MC.2015.205.
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Peitz, Sebastian, and Michael Dellnitz. “Multiobjective Optimization of the Flow Around a Cylinder Using Model Order Reduction.”10.1002/pamm.201510296__PAMM, vol. 15, no. 1, WILEY-VCH Verlag, 2015, pp. 613–14, doi:10.1002/pamm.201510296.
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Lass, Michael. Localization and Analysis of Code Paths Suitable for Acceleration Using Approximate Computing. Paderborn University, 2015.
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Funke, Lukas. An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications Using FPGA Overlay Architectures. Universität Paderborn, 2015.
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Löcke, Thomas. Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn, 2015.
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Wallaschek, Felix. Accelerating Programmable Logic Controllers with the Use of FPGAs. Universität Paderborn, 2015.
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Beisel, Tobias. Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Logos Verlag Berlin GmbH, 2015.
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Kenter, Tobias, et al. “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study.”10.1155/2015/859425__International Journal of Reconfigurable Computing (IJRC), vol. 2015, 859425, Hindawi, 2015, doi:10.1155/2015/859425.
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Damschen, Marvin, and Christian Plessl. “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores.” Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
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Schumacher, Jörn, et al. “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm.”10.1145/2675743.2771824__Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015, doi:10.1145/2675743.2771824.
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Plessl, Christian, et al. “Aktuelles Schlagwort: Approximate Computing.”10.1007/s00287-015-0911-z__Informatik Spektrum, no. 5, Springer, 2015, pp. 396–99, doi:10.1007/s00287-015-0911-z.
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Damschen, Marvin, et al. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.”10.7873/DATE.2015.1124__Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–83, doi:10.7873/DATE.2015.1124.
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Anderson, J., et al. “FELIX: A High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades.”10.1088/1742-6596/664/8/082050__Journal of Physics: Conference Series, vol. 664, 082050, IOP Publishing, 2015, doi:10.1088/1742-6596/664/8/082050.
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Steinle, Tobias, et al. “Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres.”10.1007/978-3-319-09063-4_19__Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), edited by Hans Georg Bock et al., Springer International Publishing, 2014, pp. 233–43, doi:10.1007/978-3-319-09063-4_19.
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Graf, Tobias, et al. “On Semeai Detection in Monte-Carlo Go.”10.1007/978-3-319-09165-5_2__Proc. Conf. on Computers and Games (CG), no. 8427, Springer, 2014, pp. 14–25, doi:10.1007/978-3-319-09165-5_2.
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Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen Hardware und Software.” Logiken strukturbildender Prozesse: Automatismen, edited by Jörn Künsemöller et al., Wilhelm Fink, 2014, pp. 123–44.
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Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.”10.1007/978-3-319-05960-0_13__Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.
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Agne, Andreas, et al. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators.”10.1016/j.micpro.2013.12.001__Microprocessors and Microsystems, vol. 38, no. 8, Part B, Elsevier, 2014, pp. 911–19, doi:10.1016/j.micpro.2013.12.001.
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Riebler, Heinrich, et al. “Reconstructing AES Key Schedules from Decayed Memory with FPGAs.”10.1109/FCCM.2014.67__Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–29, doi:10.1109/FCCM.2014.67.
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Agne, Andreas, et al. “Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.”10.1145/2617596__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, 13, ACM, 2014, doi:10.1145/2617596.
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Agne, Andreas, et al. “ReconOS - An Operating System Approach for Reconfigurable Computing.”10.1109/MM.2013.110__IEEE Micro, vol. 34, no. 1, IEEE, 2014, pp. 60–71, doi:10.1109/MM.2013.110.
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C. Durelli, Gianluca, et al. “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.”10.1109/ISPA.2014.27__Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–49, doi:10.1109/ISPA.2014.27.
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Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application Runtime.”10.1109/ReConFig.2014.7032509__Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509.
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Kenter, Tobias, et al. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.”10.1109/ReConFig.2014.7032535__Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535.
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C. Durelli, Gianluca, et al. “SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures.”10.1007/978-3-319-05960-0_38__Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014, doi:10.1007/978-3-319-05960-0_38.
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Giefers, Heiner, et al. “Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers.”10.1145/2641361.2641372__ACM SIGARCH Computer Architecture News, vol. 41, no. 5, ACM, 2014, pp. 65–70, doi:10.1145/2641361.2641372.
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Kaiser, Jürgen, et al. “MCD: Overcoming the Data Download Bottleneck in Data Centers.”10.1109/NAS.2013.18__Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE Computer Society, 2013, pp. 88–97, doi:10.1109/NAS.2013.18.
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Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.”10.1109/SIU.2013.6531530__Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013, doi:10.1109/SIU.2013.6531530.
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Berenbrink, Petra, et al. “Distributing Storage in Cloud Environments.”10.1109/IPDPSW.2013.148__Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE, 2013, doi:10.1109/IPDPSW.2013.148.
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Niehörster, Oliver. Autonomous Resource Management in Dynamic Data Centers. Shaker, 2013.
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Meister, Dirk. Advanced Data Deduplication Techniques and Their Application. Johannes Gutenberg-Universität Mainz, 2013.
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Kasap, Server, and Soydan Redif. “Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices.”10.1109/TVLSI.2013.2248069__IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 3, IEEE, 2013, pp. 522–36, doi:10.1109/TVLSI.2013.2248069.
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Meister, Dirk, et al. “File Recipe Compression in Data Deduplication Systems.” Proc. USENIX Conference on File and Storage Technologies (FAST), USENIX Association, 2013, pp. 175–82.
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Riebler, Heinrich. Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.
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Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.”10.1109/FPT.2013.6718394__Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394.
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Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.”10.1109/ISORC.2013.6913232__Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.
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Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.”10.1109/IPDPSW.2013.136__Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136.
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Niehörster, Oliver, et al. “Cost-Aware and SLO Fulfilling Software as a Service.”10.1007/s10723-012-9230-7__Journal of Grid Computing, vol. 10, no. 3, 2012, pp. 553–77, doi:10.1007/s10723-012-9230-7.
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Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation of an Approximate Polynomial Matrix EVD Algorithm.”10.1109/FPT.2012.6412125__Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–40, doi:10.1109/FPT.2012.6412125.
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Kaiser, Jürgen, et al. “ESB: Ext2 Split Block Device.”10.1109/ICPADS.2012.34__Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2012, pp. 181–88, doi:10.1109/ICPADS.2012.34.
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Meister, Dirk, et al. “A Study on Data Deduplication in HPC Storage Systems.”10.1109/SC.2012.14__Proc. Int. Conf. on Supercomputing (SC), IEEE Computer Society, 2012, pp. 7:1-7:11, doi:10.1109/SC.2012.14.
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Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” Int. Architecture and Engineering Symp. (ARCHENG), 2012.
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Grawinkel, Matthias, et al. “Towards Dynamic Scripted PNFS Layouts.”10.1109/SC.Companion.2012.13__Proc. Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17, doi:10.1109/SC.Companion.2012.13.
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Gesing, Sandra, et al. “A Single Sign-On Infrastructure for Science Gateways on a Use Case for Structural Bioinformatics.”10.1007/s10723-012-9247-y__Journal of Grid Computing, vol. 10, no. 4, Springer, 2012, pp. 769–90, doi:10.1007/s10723-012-9247-y.
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Wistuba, Martin, et al. “Comparison of Bayesian Move Prediction Systems for Computer Go.”10.1109/CIG.2012.6374143__Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99, doi:10.1109/CIG.2012.6374143.
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Congiu, Giuseppe, et al. “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services.”10.1109/ClusterW.2012.16__Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24, doi:10.1109/ClusterW.2012.16.
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Redif, Soydan, and Server Kasap. “Parallel Algorithm for Computation of Second-Order Sequential Best Rotations.”10.1080/00207217.2012.751343__Int. Journal of Electronics, vol. 100, no. 12, Taylor &; Francis, 2012, pp. 1646–51, doi:10.1080/00207217.2012.751343.
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Kasap, Server, and Khaled Benkrid. “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer.” Journal of Computers, vol. 7, no. 6, Academy Publishers, 2012, pp. 1312–28.
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Herres-Pawlis, Sonja, et al. “Workflow-Enhanced Conformational Analysis of Guanidine Zinc Complexes via a Science Gateway.”10.3233/978-1-61499-054-3-142__Studies in Health Technology and Informatics, vol. 175, IOP Publishing, 2012, pp. 142–51, doi:10.3233/978-1-61499-054-3-142.
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Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.”10.1109/ReConFig.2012.6416745__Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
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Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?”10.1109/ReConFig.2012.6416773__Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
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