J. C. Mertens, A. Boschmann, M. Schmidt, and C. Plessl, “Sprint diagnostic with GPS and inertial sensor fusion,” Sports Engineering, vol. 21, no. 4, pp. 441–451, 2018.

A. Ramaswami, Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA. Universität Paderborn, 2018.

S. M. H. Luk et al., “Theory of optically controlled anisotropic polariton transport in semiconductor double microcavities,”10.1364/josab.35.000146__Journal of the Optical Society of America B, vol. 35, no. 1, Art. no. 146, 2018, doi:10.1364/josab.35.000146 .

T. Kenter et al., “OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes,”10.1109/FCCM.2018.00037__presented at the Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2018, doi:10.1109/FCCM.2018.00037 .

M. Lass, S. Mohr, H. Wiebeler, T. Kühne, and C. Plessl, “A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices,”10.1145/3218176.3218231__presented at the Platform for Advanced Scientific Computing Conference (PASC), Basel, Switzerland, 2018, doi:10.1145/3218176.3218231 .

H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,”10.1145/3178487.3178534__2018, doi:10.1145/3178487.3178534 .

H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,”10.1145/3053687__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, p. 24:1-24:23, 2017, doi:10.1145/3053687 .

T. Kenter, J. Förstner, and C. Plessl, “Flexible FPGA design for FDTD using OpenCL,”10.23919/FPL.2017.8056844__2017, doi:10.23919/FPL.2017.8056844 .

J. Schumacher, C. Plessl, and W. Vandelli, “High-Throughput and Low-Latency Network Communication with NetIO,”10.1088/1742-6596/898/8/082003__Journal of Physics: Conference Series, vol. 898, Art. no. 082003, 2017, doi:10.1088/1742-6596/898/8/082003 .

T. Steinle, Modeling and simulation of metallic, particle-damped spheres for lightweight materials. 2016.

M. Dellnitz et al., “Multiobjective Optimal Control Methods for the Development of an Intelligent Cruise Control,” in Progress in Industrial Mathematics at ECMI, 2016, vol. 22, pp. 633–641.

M. Lass, D. Leibenger, and C. Sorge, “Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension,” in Proc. 41st Conference on Local Computer Networks (LCN), 2016.

C. Tölke, Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung. Universität Paderborn, 2016.

G. Wüllrich, Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment. Universität Paderborn, 2016.

T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn, 2016.

A. Agne, M. Platzner, C. Plessl, M. Happe, and E. Lübbers, “ReconOS,” in FPGAs for Software Programmers, D. Koch, F. Hannig, and D. Ziener, Eds. Cham: Springer International Publishing, 2016, pp. 227–244.

H. Riebler, G. F. Vaz, C. Plessl, E. M. G. Trainiti, G. C. Durelli, and C. Bolchini, “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” 2016.

T. Kenter and C. Plessl, “Microdisk Cavity FDTD Simulation on FPGA using OpenCL,” 2016.

M. Lass, T. Kühne, and C. Plessl, “Using Approximate Computing in Scientific Codes,” 2016.

H. Riebler et al., “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,”10.1109/RTSI.2016.7740545__in Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 2016, pp. 1–5, doi:10.1109/RTSI.2016.7740545 .

A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-aware Compute Nodes,” in Self-aware Computing Systems, Cham: Springer International Publishing, 2016, pp. 145–165.

G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,”10.1016/j.compeleceng.2016.04.021__Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi:10.1016/j.compeleceng.2016.04.021 .

A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 2016, pp. 912–917.

T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.

S. Hegler et al., “Simulative Ultraschall-Untersuchung von Pitch-Catch-Messanordnungen für große zylindrische Stahl-Prüflinge und gradientenbasierte Bildgebung,” tm - Technisches Messen, vol. 82, no. 9, pp. 440–450, 2015.

J. Torresen, C. Plessl, and X. Yao, “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction,” IEEE Computer, vol. 48, no. 7, pp. 18–20, 2015.

S. Peitz and M. Dellnitz, “Multiobjective Optimization of the Flow Around a Cylinder Using Model Order Reduction,” PAMM, vol. 15, no. 1, pp. 613–614, 2015.

M. Lass, Localization and Analysis of Code Paths Suitable for Acceleration using Approximate Computing. Paderborn: Paderborn University, 2015.

L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn, 2015.

T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn, 2015.

F. Wallaschek, Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn, 2015.

T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH, 2015.

T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,”10.1155/2015/859425__International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi:10.1155/2015/859425 .

M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015.

J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,”10.1145/2675743.2771824__2015, doi:10.1145/2675743.2771824 .

C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,”10.1007/s00287-015-0911-z__Informatik Spektrum, no. 5, pp. 396–399, 2015, doi:10.1007/s00287-015-0911-z .

M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,”10.7873/DATE.2015.1124__in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi:10.7873/DATE.2015.1124 .

J. Anderson et al., “FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades,”10.1088/1742-6596/664/8/082050__Journal of Physics: Conference Series, vol. 664, Art. no. 082050, 2015, doi:10.1088/1742-6596/664/8/082050 .

T. Steinle, J. Vrabec, and A. Walther, “Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres,” in Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), 2014, pp. 233–243.

T. Graf, L. Schaefers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go,” in Proc. Conf. on Computers and Games (CG), 2014, no. 8427, pp. 14–25.

M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware und Software,” in Logiken strukturbildender Prozesse: Automatismen, J. Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink, 2014, pp. 123–144.

T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,”10.1007/978-3-319-05960-0_13__in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi:10.1007/978-3-319-05960-0_13 .

A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators,”10.1016/j.micpro.2013.12.001__Microprocessors and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi:10.1016/j.micpro.2013.12.001 .

H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,”10.1109/FCCM.2014.67__in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi:10.1109/FCCM.2014.67 .

A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness as a Model for Designing and Operating Heterogeneous Multicores,”10.1145/2617596__ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no. 13, 2014, doi:10.1145/2617596 .

A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable Computing,”10.1109/MM.2013.110__IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi:10.1109/MM.2013.110 .

G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,”10.1109/ISPA.2014.27__in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi:10.1109/ISPA.2014.27 .

G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,”10.1109/ReConFig.2014.7032509__in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509 .

T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,”10.1109/ReConFig.2014.7032535__in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535 .

G. C. Durelli et al., “SAVE: Towards efficient resource management in heterogeneous system architectures,”10.1007/978-3-319-05960-0_38__2014, doi:10.1007/978-3-319-05960-0_38 .

H. Giefers, C. Plessl, and J. Förstner, “Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers,”10.1145/2641361.2641372__ACM SIGARCH Computer Architecture News, vol. 41, no. 5, pp. 65–70, 2014, doi:10.1145/2641361.2641372 .

J. Kaiser, D. Meister, V. Gottfried, and A. Brinkmann, “MCD: Overcoming the Data Download Bottleneck in Data Centers,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2013, pp. 88–97.

S. Kasap and S. Redif, “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm,” in Proc. IEEE Signal Processing and Communications Conf. (SUI), 2013.

P. Berenbrink, A. Brinkmann, T. Friedetzky, D. Meister, and L. Nagel, “Distributing Storage in Cloud Environments,” in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013.

O. Niehörster, Autonomous Resource Management in Dynamic Data Centers. Aachen, Germany: Shaker, 2013.

D. Meister, Advanced Data Deduplication Techniques and Their Application. Johannes Gutenberg-Universität Mainz, 2013.

S. Kasap and S. Redif, “Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices,” IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 3, pp. 522–536, 2013.

D. Meister, A. Brinkmann, and T. Süß, “File Recipe Compression in Data Deduplication Systems,” in Proc. USENIX Conference on File and Storage Technologies (FAST), 2013, pp. 175–182.

H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.

H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,”10.1109/FPT.2013.6718394__in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi:10.1109/FPT.2013.6718394 .

M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,”10.1109/ISORC.2013.6913232__2013, doi:10.1109/ISORC.2013.6913232 .

T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining on the Intel SCC Many-Core Computer,”10.1109/IPDPSW.2013.136__in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136 .

O. Niehörster, J. Simon, A. Brinkmann, A. Keller, and J. Krüger, “Cost-aware and SLO Fulfilling Software as a Service,” Journal of Grid Computing, vol. 10, no. 3, pp. 553–577, 2012.

S. Kasap and S. Redif, “FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2012, pp. 135–140.

J. Kaiser, D. Meister, T. Hartung, and A. Brinkmann, “ESB: Ext2 Split Block Device,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2012, pp. 181–188.

D. Meister, J. Kaiser, A. Brinkmann, M. Kuhn, J. Kunkel, and T. Cortes, “A Study on Data Deduplication in HPC Storage Systems,” in Proc. Int. Conf. on Supercomputing (SC), 2012, pp. 7:1-7:11.

S. Kasap and S. Redif, “FPGA implementation of a second-order convolutive blind signal separation algorithm,” in Int. Architecture and Engineering Symp. (ARCHENG), 2012.

M. Grawinkel, T. Süß, G. Best, I. Popov, and A. Brinkmann, “Towards Dynamic Scripted pNFS Layouts,” in Proc. Parallel Data Storage Workshop (PDSW), 2012, pp. 13–17.

S. Gesing et al., “A Single Sign-On Infrastructure for Science Gateways on a Use Case for Structural Bioinformatics,” Journal of Grid Computing, vol. 10, no. 4, pp. 769–790, 2012.

M. Wistuba, L. Schaefers, and M. Platzner, “Comparison of Bayesian Move Prediction Systems for Computer Go,” in Proc. IEEE Conf. on Computational Intelligence and Games (CIG), 2012, pp. 91–99.

T. Schlemmer et al., “Generic User Management for Science Gateways via Virtual Organizations,” in Proc. EGI Technical Forum, 2012.

G. Congiu, M. Grawinkel, S. Narasimhamurthy, and A. Brinkmann, “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services,” in Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 2012, pp. 16–24.

R. Grunzke et al., “A Data Driven Science Gateway for Computational Workflows,” in Proc. UNICORE Summit, 2012.

J. Kaiser, D. Meister, A. Brinkmann, and S. Effert, “Design of an exact data deduplication cluster,” in Proc. Symp. on Mass Storage Systems and Technologies (MSST), 2012, pp. 1–12.

S. Gesing et al., “The MoSGrid Community From National to International Scale,” in Proc. EGI Community Forum, 2012.

K. Thielemans et al., “STIR: Software for Tomographic Image Reconstruction Release 2,” Physics in Medicine and Biology, vol. 57, no. 4, pp. 867–883, 2012.

S. Redif and S. Kasap, “Parallel algorithm for computation of second-order sequential best rotations,” Int. Journal of Electronics, vol. 100, no. 12, pp. 1646–1651, 2012.

S. Kasap and K. Benkrid, “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer,” Journal of Computers, vol. 7, no. 6, pp. 1312–1328, 2012.

S. Herres-Pawlis et al., “Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway,” Studies in Health Technology and Informatics, vol. 175, pp. 142–151, 2012.

S. Gesing et al., “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community,” in Proceedings of Science, 2012, vol. PoS(EGIC-EMIT)050.

C. Plessl, M. Platzner, A. Agne, M. Happe, and E. Lübbers, Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine, 2012.

B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,”10.1109/FPL.2012.6339370__in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi:10.1109/FPL.2012.6339370 .

T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,”10.1016/j.micpro.2011.04.002__Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi:10.1016/j.micpro.2011.04.002 .

M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,”10.1109/ReConFig.2012.6416745__in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745 .

T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,”10.1109/ReConFig.2012.6416773__in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773 .

M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.

P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,”10.1109/HPCSim.2012.6266973__in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi:10.1109/HPCSim.2012.6266973 .

C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,”10.1109/FPL.2012.6339370__in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi:10.1109/FPL.2012.6339370 .

T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.

M. Grad and C. Plessl, “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors,”10.1155/2012/418315__Int. Journal of Reconfigurable Computing (IJRC), 2012, doi:10.1155/2012/418315 .

C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.

G. Birkenheuer et al., “Virtualized HPC: a contradiction in terms?,” Software: Practice and Experience, 2011.

O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,” in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.

A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems,” in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.

M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387.

O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 2011, pp. 138–145.

T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.

G. Birkenheuer et al., “Infrastructure Federation Through Virtualized Delegation of Resources and Services,” Journal of Grid Computing, vol. 9, no. 3, pp. 355–377, 2011.

M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,” in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, pp. 297–306.

A. Brinkmann, Y. Gao, M. Korzeniowski, and D. Meister, “Request Load Balancing for Highly Skewed Traffic in P Networks,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2011, pp. 53–62.