Ausbeute und Fehlertoleranz bei dreifach modularer Redundanz
M. Hunger, S. Hellebrand, in: 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” Wildbad Kreuth, Germany, 2010, pp. 81–88.
LibreCat: /record/13051

Nano-Electronic Systems
S. Hellebrand, Nano-Electronic Systems, Editorial, it 4/2010, pp. 179-180, 2010.
LibreCat: /record/13073

Scalable Multi Phase Interleaved Boundary Mode PFC Concept enabling Energy- and Cost Efficient PSUs in the kW-Range
F. Schafmeister, X. Wang, T. Grote, P. Ide, in: Proc. IEEE International Symposium on Industrial Electronics (ISIE), IEEE, Bari, Italy, 2010, pp. 3831–3835.
LibreCat: /record/30321

FPGA-based realization of self-optimizing drive-controllers
C. Paiz, J. Hagemeyer, C. Pohl, M. Porrmann, U. Rückert, B. Schulz, W. Peters, J. Böcker, in: 2009 35th Annual Conference of IEEE Industrial Electronics, IEEE, 2010.
LibreCat: /record/30516
DOI: 10.1109/iecon.2009.5415402

Optimal energy management for a hybrid energy storage system for electric vehicles based on Stochastic Dynamic Programming
C. Romaus, K. Gathmann, J. Böcker, in: 2010 IEEE Vehicle Power and Propulsion Conference, IEEE, 2010.
LibreCat: /record/30523
DOI: 10.1109/vppc.2010.5728979

Efficiency improvement of an IPMSM using Maximum Efficiency operating strategy
D. Pohlenz, J. Böcker, in: Proceedings of 14th International Power Electronics and Motion Control Conference EPE-PEMC 2010, IEEE, 2010.
LibreCat: /record/30524
DOI: 10.1109/epepemc.2010.5606831

Observer for the rotor temperature of IPMSM
A. Specht, J. Böcker, in: Proceedings of 14th International Power Electronics and Motion Control Conference EPE-PEMC 2010, IEEE, 2010.
LibreCat: /record/30525
DOI: 10.1109/epepemc.2010.5606818

Multiobjective search for the management of a hybrid energy storage system
S. Boxnick, S. Klopfer, C. Romaus, B. Klopper, in: 2010 8th IEEE International Conference on Industrial Informatics, IEEE, 2010.
LibreCat: /record/30522
DOI: 10.1109/indin.2010.5549487

Energy transfer with doubly-excited switched reluctance drive
T. Schneider, C. Schulte, S. Mathapati, J. Böcker, in: SPEEDAM 2010, IEEE, 2010.
LibreCat: /record/30526
DOI: 10.1109/speedam.2010.5545160

Modeling and Control Design for a Very Low-Frequency High-Voltage Test System
Z. Cao, M. Hu, N. Fröhleke, J. Böcker, in: IEEE TRANSACTIONS ON POWER ELECTRONICS 25(2), 2010.
LibreCat: /record/30521
DOI: 10.1109/TPEL.2009.2033600

Optimal Design of Motor and Gear for Drives With High Acceleration by Consideration of Torque–Speed and Torque–Acceleration Product
H. Grotstollen, IEEE Transactions on Industry Applications 47 (2010) 144–152.
LibreCat: /record/30536
DOI: 10.1109/tia.2010.2091479

Entwurf und Betrieb hybrid-elektrischer Fahrzeugantriebe am Beispiel von Abfallsammelfahrzeugen
T. Knoke, Entwurf und Betrieb hybrid-elektrischer Fahrzeugantriebe am Beispiel von Abfallsammelfahrzeugen, 2010.
LibreCat: /record/30530

Wirkungsgradoptimierte Regelung hoch ausgenutzter Permanent-Synchronmaschinen im Antriebsstrang von Automobilen
M. Meyer, Wirkungsgradoptimierte Regelung hoch ausgenutzter Permanent-Synchronmaschinen im Antriebsstrang von Automobilen, 2010.
LibreCat: /record/30529

Power Supplies for High-Power Piezoelectric Ultrasonic Motor
R. Li, Power Supplies for High-Power Piezoelectric Ultrasonic Motor, 2010.
LibreCat: /record/30528

Variation-Aware Fault Modeling
F. Hopsch, B. Becker, S. Hellebrand, I. Polian, B. Straube, W. Vermeiren, H.-J. Wunderlich, in: 19th IEEE Asian Test Symposium (ATS’10), IEEE, Shanghai, China, 2010, pp. 87–93.
LibreCat: /record/12983
DOI: 10.1109/ats.2010.24

Efficient Test Response Compaction for Robust BIST Using Parity Sequences
T. Indlekofer, M. Schnittger, S. Hellebrand, in: 28th IEEE International Conference on Computer Design (ICCD’10), IEEE, Amsterdam, The Netherlands, 2010, pp. 480–485.
LibreCat: /record/12985
DOI: 10.1109/iccd.2010.5647648

The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems
M. Hunger, S. Hellebrand, in: 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), IEEE, Kyoto, Japan, 2010, pp. 101–108.
LibreCat: /record/12986
DOI: 10.1109/dft.2010.19

Reusing NoC-Infrastructure for Test Data Compression
V. Froese, R. Ibers, S. Hellebrand, in: 28th IEEE VLSI Test Symposium (VTS’10), IEEE, Santa Cruz, CA, USA, 2010, pp. 227–231.
LibreCat: /record/12988
DOI: 10.1109/vts.2010.5469570

Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits
B. Becker, S. Hellebrand, I. Polian, B. Straube, W. Vermeiren, H.-J. Wunderlich, in: 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper), Chicago, IL, USA, 2010.
LibreCat: /record/13049

Robuster Selbsttest mit extremer Kompaktierung
T. Indlekofer, M. Schnittger, S. Hellebrand, in: 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” Wildbad Kreuth, Germany, 2010, pp. 17–24.
LibreCat: /record/13050