Oehler, P., Hellebrand, S., &; Wunderlich, H.-J. (2007). An Integrated Built-in Test and Repair Approach for Memories with 2D Redundancy. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Erlangen, Germany.
LibreCat: /record/13042

Hellebrand, S. (2007). Qualitätssicherung für Nanochips - Wie IT-Produkte zuverlässig werden. ForschungsForum Paderborn, 10. Ausgabe, Paderborn, Germany.
LibreCat: /record/13043

Hellebrand, S., G. Zoellin, C., Wunderlich, H.-J., Ludwig, S., Coym, T., &; Straube, B. (2007). A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), 50–58.https://doi.org/10.1109/dft.2007.43 
LibreCat: /record/12995
DOI: 10.1109/dft.2007.43

Oehler, P., Hellebrand, S., &; Wunderlich, H.-J. (2007). Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair. 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), 185–190.https://doi.org/10.1109/ddecs.2007.4295278 
LibreCat: /record/12996
DOI: 10.1109/ddecs.2007.4295278

Oehler, P., Hellebrand, S., &; Wunderlich, H.-J. (2007). An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. 12th IEEE European Test Symposium (ETS’07), 91–96.https://doi.org/10.1109/ets.2007.10 
LibreCat: /record/12997
DOI: 10.1109/ets.2007.10

Hellebrand, S., G. Zoellin, C., Wunderlich, H.-J., Ludwig, S., Coym, T., &; Straube, B. (2007). Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance. 43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM’07), (Invited Paper).
LibreCat: /record/13037

Hellebrand, S., G. Zoellin, C., Wunderlich, H.-J., Ludwig, S., Coym, T., &; Straube, B. (2007). Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance. Informacije MIDEM, Ljubljana (Invited Paper), 37(4 (124)), 212–219.
LibreCat: /record/13036

Ali, M., Hessler, S., Welzl, M., &; Hellebrand, S. (2007). An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip. International Journal on High Performance Systems Architecture, 1(2), 113–123.
LibreCat: /record/13044

Ali, M., Welzl, M., Hessler, S., &; Hellebrand, S. (2007). A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip. 4th International Conference on Information Technology: New Generations (ITNG’07), 1027–1032.
LibreCat: /record/13040

Becker, B., Polian, I., Hellebrand, S., Straube, B., &; Wunderlich, H.-J. (2007). Test und Zuverlässigkeit nanoelektronischer Systeme. 1. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.”
LibreCat: /record/13041