H. Jafarzadeh et al., “Robust Pattern Generation for Small Delay Faults under Process Variations,” presented at the IEEE International Test Conference (ITC’23), Anaheim, USA, 2023.
LibreCat: /record/45830

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Stress-Aware Periodic Test of Interconnects,”10.1007/s10836-021-05979-5__Journal of Electronic Testing, 2022, doi:10.1007/s10836-021-05979-5 .
LibreCat: /record/29351
DOI: 10.1007/s10836-021-05979-5

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, EM-Aware Interconnect BIST. Online: European Workshop on Silicon Lifecycle Management, March 18, 2022, 2022.
LibreCat: /record/29890

A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” 2020.
LibreCat: /record/19422

S. Sadeghi-Kohan and S. Hellebrand, Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. Ludwigsburg: 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, 2020.
LibreCat: /record/15419

S. Sadeghi-Kohan and S. Hellebrand, “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects,”10.1109/vts48691.2020.9107591__2020, doi:10.1109/vts48691.2020.9107591 .
LibreCat: /record/29200
DOI: 10.1109/vts48691.2020.9107591

S. Holst et al., “Logic Fault Diagnosis of Hidden Delay Defects,” 2020.
LibreCat: /record/19421

M. U. Maaz, A. Sprenger, and S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat: /record/8112

A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.
LibreCat: /record/8667
DOI: 10.1142/s0218126619400012

M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, and H.-J. Wunderlich, “Built-in Test for Hidden Delay Faults,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 10, pp. 1956–1968, 2019.
LibreCat: /record/13048

M. U. Maaz, A. Sprenger, and S. Hellebrand, “A Hybrid Space Compactor for Adaptive X-Handling,” in 50th IEEE International Test Conference (ITC), Washington, DC, USA, 2019, pp. 1–8.
LibreCat: /record/12918

A. Sprenger and S. Hellebrand, Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat: /record/4576

S. Hellebrand, J. Henkel, A. Raghunathan, and H.-J. Wunderlich, “Guest Editors’ Introduction - Special Issue on Approximate Computing,” IEEE Embedded Systems Letters, vol. 10, no. 1, pp. 1–1, 2018.
LibreCat: /record/12974
DOI: 10.1109/les.2018.2789942

M. Kampmann and S. Hellebrand, “Design For Small Delay Test - A Simulation Study,” Microelectronics Reliability, vol. 80, pp. 124–133, 2018.
LibreCat: /record/13057

M. Kampmann and S. Hellebrand, Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 19th Workshop on RTL and High Level Testing (WRTLT’18), Hefei, Anhui, China, 2018.
LibreCat: /record/13072

R. Rezaeizadeh Rookerd, S. Sadeghi-Kohan, and Z. Navabi, “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture,”10.1145/3194554.3194599__2018, doi:10.1145/3194554.3194599 .
LibreCat: /record/29460
DOI: 10.1145/3194554.3194599

A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,”10.1109/ddecs.2018.00020__2018, doi:10.1109/ddecs.2018.00020 .
LibreCat: /record/4575
DOI: 10.1109/ddecs.2018.00020

C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, and H.-J. Wunderlich, “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention,”10.1109/ats.2018.00028__2018, doi:10.1109/ats.2018.00028 .
LibreCat: /record/10575
DOI: 10.1109/ats.2018.00028

S. Sadeghi-Kohan, A. Vafaei, and Z. Navabi, “Near-Optimal Node Selection Procedure for Aging Monitor Placement,”10.1109/iolts.2018.8474120__2018, doi:10.1109/iolts.2018.8474120 .
LibreCat: /record/29459
DOI: 10.1109/iolts.2018.8474120

J. Deshmukh, W. Kunz, H.-J. Wunderlich, and S. Hellebrand, “Special Session on Early Life Failures,” in 35th IEEE VLSI Test Symposium (VTS’17), 2017.
LibreCat: /record/12973
DOI: 10.1109/vts.2017.7928933