A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections,”10.1109/test.2004.1387357__in IEEE International Test Conference (ITC’04), 2004, pp. 926–935, doi:10.1109/test.2004.1387357 .
LibreCat: /record/13001
DOI: 10.1109/test.2004.1387357

R. Breu, S. Hellebrand, and M. Welzl, Experiences from Teaching Software Development in a Java Environment. Handouts ACS/IEEE Workshop on Practice and Experience with Java in Education, Tunis, Tunisia, 2003.
LibreCat: /record/13098

A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “A Hybrid Coding Strategy for Optimized Test Data Compression,”10.1109/test.2003.1270870__in IEEE International Test Conference (ITC’03), 2003, pp. 451–459, doi:10.1109/test.2003.1270870 .
LibreCat: /record/13002
DOI: 10.1109/test.2003.1270870

S. Hellebrand and A. Wuertenberger, Alternating Run-Length Coding: A Technique for Improved Test Data Compression. IEEE International Workshop on Test Resource Partitioning, Baltimore, MD, USA, 2002.
LibreCat: /record/13097

S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, and V. N. Yarmolik, “Efficient Online and Offline Testing of Embedded DRAMs,”10.1109/tc.2002.1017700__IEEE Transactions on Computers, vol. 51, no. 7, pp. 801–809, 2002, doi:10.1109/tc.2002.1017700 .
LibreCat: /record/13003
DOI: 10.1109/tc.2002.1017700

S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST,” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 18, no. 2, pp. 157–168, 2002.
LibreCat: /record/13069

H. Liang, S. Hellebrand, and H.-J. Wunderlich, “A Mixed-Mode BIST Scheme Based on Folding Compression,” Journal on Computer Science and Technology, vol. 17, no. 2, pp. 203–212, 2002.
LibreCat: /record/13070

H.-G. Liang, S. Hellebrand, and H.-J. Wunderlich, Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. IEEE European Test Workshop, Stockholm, Sweden, 2001.
LibreCat: /record/13096

H.-G. Liang, S. Hellebrand, and H.-J. Wunderlich, “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST,”10.1109/test.2001.966712__in IEEE International Test Conference (ITC’01), 2001, pp. 894–902, doi:10.1109/test.2001.966712 .
LibreCat: /record/13004
DOI: 10.1109/test.2001.966712

H.-G. Liang, S. Hellebrand, and H.-J. Wunderlich, “Deterministic BIST Scheme Based on Reseeding of Folding Counters,” Journal of Computer Research and Development, (Jisuanji Yanjiu yu Fazhan), vol. 38, no. 8, p. 931, 2001.
LibreCat: /record/13047

S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters,” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 17, no. 3/4, pp. 341–349, 2001.
LibreCat: /record/13068

S. Hellebrand and H.-J. Wunderlich, Hardwarepraktikum im Diplomstudiengang Informatik. Handbuch Lehre, Berlin, Raabe Verlag, 2000.
LibreCat: /record/13094

S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal, 2000.
LibreCat: /record/13095

S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters,”10.1109/test.2000.894274__in IEEE International Test Conference (ITC’00), 2000, pp. 778–784, doi:10.1109/test.2000.894274 .
LibreCat: /record/13005
DOI: 10.1109/test.2000.894274

S. Hellebrand, Selbsttestbare Steuerwerke - Strukturen und Syntheseverfahren. Verlag Dr. Kovac, Hamburg: Verlag Dr. Kovac, Hamburg, 1999.
LibreCat: /record/13065

S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop, 1999.
LibreCat: /record/13093

S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, and V. N. Yarmolik, “Error Detecting Refreshment for Embedded DRAMs,”10.1109/vtest.1999.766693__in 17th IEEE VLSI Test Symposium (VTS’99), 1999, pp. 384–390, doi:10.1109/vtest.1999.766693 .
LibreCat: /record/13006
DOI: 10.1109/vtest.1999.766693

V. N. Yarmolik, I. V. Bykov, S. Hellebrand, and H.-J. Wunderlich, “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms,” 1999.
LibreCat: /record/13066

S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Symmetric Transparent BIST for RAMs,” in Design Automation and Test in Europe (DATE’99), 1999, pp. 702–707.
LibreCat: /record/13067

S. Hellebrand and H.-J. Wunderlich, Test und Synthese schneller eingebetteter Systeme. Universität Stuttgart, 1998.
LibreCat: /record/13029