Faj, J., Kenter, T., Faghih-Naini, S., Plessl, C., &; Aizinger, V. (2023). Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes. Proceedings of the Platform for Advanced Scientific Computing Conference (PASC).https://doi.org/10.1145/3592979.3593407 
LibreCat: /record/46188
DOI: 10.1145/3592979.3593407

Prouveur, C., Haefele, M., Kenter, T., &; Voss, N. (2023). FPGA Acceleration for HPC Supercapacitor Simulations. Proceedings of the Platform for Advanced Scientific Computing Conference (PASC).https://doi.org/10.1145/3592979.3593419 
LibreCat: /record/46189
DOI: 10.1145/3592979.3593419

Lass, M. (2022). Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Universität Paderborn.https://doi.org/10.17619/UNIPB/1-1281 
LibreCat: /record/32414
DOI: 10.17619/UNIPB/1-1281

Gavini, V., Baroni, S., Blum, V., Bowler, D. R., Buccheri, A., Chelikowsky, J. R., Das, S., Dawson, W., Delugas, P., Dogan, M., Draxl, C., Galli, G., Genovese, L., Giannozzi, P., Giantomassi, M., Gonze, X., Govoni, M., Gulans, A., Gygi, F.,  Perez, D. (2022). Roadmap on Electronic Structure Codes in the Exascale Era. In arXiv:2209.12747.
LibreCat: /record/33493
arXiv: 2209.12747

Karp, M., Podobas, A., Kenter, T., Jansson, N., Plessl, C., Schlatter, P., &; Markidis, S. (2022). A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges. International Conference on High Performance Computing in Asia-Pacific Region.https://doi.org/10.1145/3492805.3492808 
LibreCat: /record/46193
DOI: 10.1145/3492805.3492808

Kühne, T., Plessl, C., Schade, R., &; Schütt, O. (2022). CK on the road to exascale. In arXiv:2205.14741.
LibreCat: /record/32404
arXiv: 2205.14741

Schade, R., Bauer, C., Tamoev, K., Mazur, L., Plessl, C., &; Kühne, T. (2022). Parallel quantum chemistry on noisy intermediate-scale quantum computers. Phys. Rev. Research, 4, 033160.https://doi.org/10.1103/PhysRevResearch.4.033160 
LibreCat: /record/33226
DOI: 10.1103/PhysRevResearch.4.033160

Schade, R., Kenter, T., Elgabarty, H., Lass, M., Schütt, O., Lazzaro, A., Pabst, H., Mohr, S., Hutter, J., Kühne, T., &; Plessl, C. (2022). Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms. Parallel Computing, 111, Article 102920.https://doi.org/10.1016/j.parco.2022.102920 
LibreCat: /record/33684
DOI: 10.1016/j.parco.2022.102920

Meyer, M., Kenter, T., &; Plessl, C. (2022). In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL. Journal of Parallel and Distributed Computing.https://doi.org/10.1016/j.jpdc.2021.10.007 
LibreCat: /record/27364
DOI: 10.1016/j.jpdc.2021.10.007

Menzel, J., Plessl, C., &; Kenter, T. (2021). The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations. ACM Transactions on Reconfigurable Technology and Systems, 15(1), 1–30.https://doi.org/10.1145/3491235 
LibreCat: /record/28099
DOI: 10.1145/3491235

Karp, M., Podobas, A., Jansson, N., Kenter, T., Plessl, C., Schlatter, P., &; Markidis, S. (2021). High-Performance Spectral Element Methods on Field-Programmable Gate Arraysf: Implementation, Evaluation, and Future Projection. 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS).https://doi.org/10.1109/ipdps49936.2021.00116 
LibreCat: /record/46195
DOI: 10.1109/ipdps49936.2021.00116

Alhaddad, S., Förstner, J., Groth, S., Grünewald, D., Grynko, Y., Hannig, F., Kenter, T., Pfreundt, F.-J., Plessl, C., Schotte, M., Steinke, T., Teich, J., Weiser, M., &; Wende, F. (2021). HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids. In Euro-Par 2020: Parallel Processing Workshops.https://doi.org/10.1007/978-3-030-71593-9_15 
LibreCat: /record/21587
DOI: 10.1007/978-3-030-71593-9_15

Ramaswami, A., Kenter, T., Kühne, T., &; Plessl, C. (2021). Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing. In Applied Reconfigurable Computing. Architectures, Tools, and Applications. Int. Conf. on Applied Reconfigurable Computing. Architectures, Tools, and Applications. Springer International Publishing.https://doi.org/10.1007/978-3-030-79025-7_21 
LibreCat: /record/29936
DOI: 10.1007/978-3-030-79025-7_21

Alhaddad, S., Förstner, J., Groth, S., Grünewald, D., Grynko, Y., Hannig, F., Kenter, T., Pfreundt, F., Plessl, C., Schotte, M., Steinke, T., Teich, J., Weiser, M., &; Wende, F. (2021). The HighPerMeshes framework for numerical algorithms on unstructured grids. Concurrency and Computation: Practice and Experience, e6616.https://doi.org/10.1002/cpe.6616 
LibreCat: /record/24788
DOI: 10.1002/cpe.6616

Karp, M., Podobas, A., Jansson, N., Kenter, T., Plessl, C., Schlatter, P., &; Markidis, S. (2021). High-Performance Spectral Element Methods on Field-Programmable Gate Arraysf: Implementation, Evaluation, and Future Projection. 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS).https://doi.org/10.1109/ipdps49936.2021.00116 
LibreCat: /record/29937
DOI: 10.1109/ipdps49936.2021.00116

Kenter, T., Shambhu, A., Faghih-Naini, S., &; Aizinger, V. (2021). Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA. Proceedings of the Platform for Advanced Scientific Computing Conference (PASC).https://doi.org/10.1145/3468267.3470617 
LibreCat: /record/46194
DOI: 10.1145/3468267.3470617

Kühne, T., Iannuzzi, M., Ben, M. D., Rybkin, V. V., Seewald, P., Stein, F., Laino, T., Khaliullin, R. Z., Schütt, O., Schiffmann, F., Golze, D., Wilhelm, J., Chulkov, S., Mohammad Hossein Bani-Hashemian, M. H. B.-H., Weber, V., Borstnik, U., Taillefumier, M., Jakobovits, A. S., Lazzaro, A.,https://doi.org/10.1063/5.0007045__Hutter, J. (2020). CK: An electronic structure and molecular dynamics software package - Quickstep: Efficient and accurate electronic structure calculations. The Journal of Chemical Physics, 152(19), Article 194103.https://doi.org/10.1063/5.0007045 
LibreCat: /record/16277
DOI: 10.1063/5.0007045
arXiv: 2003.03868

Lass, M., Schade, R., Kühne, T., &; Plessl, C. (2020). A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CK. Proc. International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 1127–1140.https://doi.org/10.1109/SC41405.2020.00084 
LibreCat: /record/16898
DOI: 10.1109/SC41405.2020.00084
arXiv: 2004.10811

Meyer, M., Kenter, T., &; Plessl, C. (2020). Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite. 2020 IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC).https://doi.org/10.1109/h2rc51942.2020.00007 
LibreCat: /record/21632
DOI: 10.1109/h2rc51942.2020.00007

Rengaraj, V., Lass, M., Plessl, C., &; Kühne, T. (2020). Accurate Sampling with Noisy Forces from Approximate Computing. Computation, 8(2), Article 39.https://doi.org/10.3390/computation8020039 
LibreCat: /record/12878
DOI: 10.3390/computation8020039
arXiv: 1907.08497

Riebler, H., Vaz, G. F., Kenter, T., &; Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL. ACM Trans. Archit. Code Optim. (TACO), 16(2), 14:1–14:26.https://doi.org/10.1145/3319423 
LibreCat: /record/7689
DOI: 10.1145/3319423

Gorlani, P., Kenter, T., &; Plessl, C. (2019). OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs. In Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE.https://doi.org/10.1109/ICFPT47387.2019.00020 
LibreCat: /record/15478
DOI: 10.1109/ICFPT47387.2019.00020

Vaz, G. F. (2019). Using Just-in-Time Code Generation to Transparently Accelerate Applications in Heterogeneous Systems. Universität Paderborn.
LibreCat: /record/14849

Richters, D., Lass, M., Walther, A., Plessl, C., &; Kühne, T. (2019). A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics, 25(2), 564–585.https://doi.org/10.4208/cicp.OA-2018-0053 
LibreCat: /record/21
DOI: 10.4208/cicp.OA-2018-0053
arXiv: 1703.02456

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Lass, M., Kühne, T., &; Plessl, C. (2018). Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots. Embedded Systems Letters, 10(2), 33–36.https://doi.org/10.1109/LES.2017.2760923 
LibreCat: /record/20
DOI: 10.1109/LES.2017.2760923
arXiv: 1703.02283

Filmwala, T. (2018). Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate it on FPGA Platform. Universität Paderborn.
LibreCat: /record/5414

Gadewar, O. (2018). Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL. Universität Paderborn.
LibreCat: /record/5421

Mertens, J. C., Boschmann, A., Schmidt, M., &; Plessl, C. (2018). Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering, 21(4), 441–451.https://doi.org/10.1007/s12283-018-0291-0 
LibreCat: /record/6516
DOI: 10.1007/s12283-018-0291-0

Ramaswami, A. (2018). Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA. Universität Paderborn.
LibreCat: /record/5417

Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A., Hannig, F., Förstner, J., &; Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM).https://doi.org/10.1109/FCCM.2018.00037 
LibreCat: /record/1588
DOI: 10.1109/FCCM.2018.00037

Lass, M., Mohr, S., Wiebeler, H., Kühne, T., &; Plessl, C. (2018). A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. Proc. Platform for Advanced Scientific Computing (PASC) Conference. Platform for Advanced Scientific Computing Conference (PASC), Basel, Switzerland.https://doi.org/10.1145/3218176.3218231 
LibreCat: /record/1590
DOI: 10.1145/3218176.3218231
arXiv: 1710.10899

Riebler, H., Vaz, G. F., Kenter, T., &; Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP).https://doi.org/10.1145/3178487.3178534 
LibreCat: /record/1204
DOI: 10.1145/3178487.3178534

Riebler, H., Lass, M., Mittendorf, R., Löcke, T., &; Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23.https://doi.org/10.1145/3053687 
LibreCat: /record/18
DOI: 10.1145/3053687

Kenter, T., Förstner, J., &; Plessl, C. (2017). Flexible FPGA design for FDTD using OpenCL. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL).https://doi.org/10.23919/FPL.2017.8056844 
LibreCat: /record/1592
DOI: 10.23919/FPL.2017.8056844

Schumacher, J., Plessl, C., &; Vandelli, W. (2017). High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series, 898, Article 082003.https://doi.org/10.1088/1742-6596/898/8/082003 
LibreCat: /record/1589
DOI: 10.1088/1742-6596/898/8/082003

Lass, M., Leibenger, D., &; Sorge, C. (2016). Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension. In Proc. 41st Conference on Local Computer Networks (LCN). IEEE.https://doi.org/10.1109/lcn.2016.11 
LibreCat: /record/19
DOI: 10.1109/lcn.2016.11

Tölke, C. (2016). Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung. Universität Paderborn.
LibreCat: /record/5418

Wüllrich, G. (2016). Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment. Universität Paderborn.
LibreCat: /record/5420

Kenter, T. (2016). Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn.
LibreCat: /record/161

Agne, A., Platzner, M., Plessl, C., Happe, M., &; Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, &; D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Springer International Publishing.https://doi.org/10.1007/978-3-319-26408-0_13 
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat: /record/31

Kenter, T., &; Plessl, C. (2016). Microdisk Cavity FDTD Simulation on FPGA using OpenCL. Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC).
LibreCat: /record/24

Lass, M., Kühne, T., &; Plessl, C. (2016). Using Approximate Computing in Scientific Codes. Workshop on Approximate Computing (AC).
LibreCat: /record/25

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., Santambrogio, M. D., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 1–5.https://doi.org/10.1109/RTSI.2016.7740545 
LibreCat: /record/138
DOI: 10.1109/RTSI.2016.7740545

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111.https://doi.org/10.1016/j.compeleceng.2016.04.021 
LibreCat: /record/165
DOI: 10.1016/j.compeleceng.2016.04.021

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.
LibreCat: /record/168

Kenter, T., Vaz, G. F., Riebler, H., &; Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).
LibreCat: /record/171

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205 
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Lass, M. (2015). Localization and Analysis of Code Paths Suitable for Acceleration using Approximate Computing. Paderborn: Paderborn University.
LibreCat: /record/1794

Jenert, T., &; Brahm, T. (2015). How Do They Find Their Place? A Longitudinal Study of Management Students’ Attitudes and Motivations During Their First Year at Business School. Presented at the American Educational Research Association (AERA) Annual Meeting 2015, Chicago.
LibreCat: /record/4465

Funke, L. (2015). An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn.
LibreCat: /record/5413

Löcke, T. (2015). Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn.
LibreCat: /record/5416

Wallaschek, F. (2015). Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn.
LibreCat: /record/5419

Beisel, T. (2015). Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10624

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 
LibreCat: /record/296
DOI: 10.1155/2015/859425

Damschen, M., &; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).
LibreCat: /record/303
arXiv: 1412.3906

Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann-Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., P. Schreuder, F., Vandelli, W., Vermeulen, J., &; Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. Proc. Int. Conf. on Distributed Event-Based Systems (DEBS).https://doi.org/10.1145/2675743.2771824 
LibreCat: /record/1773
DOI: 10.1145/2675743.2771824

Plessl, C., Platzner, M., &; Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, 5, 396–399.https://doi.org/10.1007/s00287-015-0911-z 
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

Damschen, M., Riebler, H., Vaz, G. F., &; Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083.https://doi.org/10.7873/DATE.2015.1124 
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., Schreuder, F., Schumacher, J., Vandelli, W., Vermeulen, J., &; Zhang, J. (2015). FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades. Journal of Physics: Conference Series, 664, Article 082050.https://doi.org/10.1088/1742-6596/664/8/082050 
LibreCat: /record/1775
DOI: 10.1088/1742-6596/664/8/082050

Platzner, M., &; Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, &; T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Wilhelm Fink.
LibreCat: /record/335

Kenter, T., Vaz, G. F., &; Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405, 144–155.https://doi.org/10.1007/978-3-319-05960-0_13 
LibreCat: /record/388
DOI: 10.1007/978-3-319-05960-0_13

Agne, A., Hangmann, H., Happe, M., Platzner, M., &; Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919.https://doi.org/10.1016/j.micpro.2013.12.001 
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Riebler, H., Kenter, T., Plessl, C., &; Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229.https://doi.org/10.1109/FCCM.2014.67 
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.https://doi.org/10.1145/2617596 
LibreCat: /record/365
DOI: 10.1145/2617596

Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &; Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71.https://doi.org/10.1109/MM.2013.110 
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., &; Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149.https://doi.org/10.1109/ISPA.2014.27 
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2014.7032509 
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509

Kenter, T., Schmitz, H., &; Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2014.7032535 
LibreCat: /record/406
DOI: 10.1109/ReConFig.2014.7032535

C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., Pell, O., Plessl, C., D. Santambrogio, M., &; Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC).https://doi.org/10.1007/978-3-319-05960-0_38 
LibreCat: /record/1780
DOI: 10.1007/978-3-319-05960-0_38

Giefers, H., Plessl, C., &; Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70.https://doi.org/10.1145/2641361.2641372 
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn.
LibreCat: /record/521

Riebler, H., Kenter, T., Sorge, C., &; Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389.https://doi.org/10.1109/FPT.2013.6718394 
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

Happe, M., Kling, P., Plessl, C., Platzner, M., &; Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS).https://doi.org/10.1109/ISORC.2013.6913232 
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Suess, T., Schoenrock, A., Meisner, S., &; Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73.https://doi.org/10.1109/IPDPSW.2013.136 
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

Grunzke, R., Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Gesing, S.,  Zink, A. (2012). A Data Driven Science Gateway for Computational Workflows. In Proc. UNICORE Summit.
LibreCat: /record/2107

Plessl, C., Platzner, M., Agne, A., Happe, M., &; Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
LibreCat: /record/587

Meyer, B., Schumacher, J., Plessl, C., &; Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196.https://doi.org/10.1109/FPL.2012.6339370 
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Schumacher, T., Plessl, C., &; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126.https://doi.org/10.1016/j.micpro.2011.04.002 
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Happe, M., Hangmann, H., Agne, A., &; Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416745 
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Kenter, T., Plessl, C., &; Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416773 
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Happe, M., Agne, A., Plessl, C., &; Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.
LibreCat: /record/609

Barrio, P., Carreras, C., Sierra, R., Kenter, T., &; Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565.https://doi.org/10.1109/HPCSim.2012.6266973 
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Rüthing, C., Happe, M., Agne, A., &; Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562.https://doi.org/10.1109/FPL.2012.6339370 
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).
LibreCat: /record/2180

Grad, M., &; Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC).https://doi.org/10.1155/2012/418315 
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Kenter, T., Plessl, C., Platzner, M., &; Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
LibreCat: /record/2191

Plessl, C., &; Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui &; H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global.https://doi.org/10.4018/978-1-60960-086-0 
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Sekanina, L., Walker, J. A., Kaufmann, P., Plessl, C., &; Platzner, M. (2011). Evolution of Electronic Circuits. In Cartesian Genetic Programming (pp. 125–179). Springer Berlin Heidelberg.
LibreCat: /record/10737

Meyer, B., Plessl, C., &; Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63.https://doi.org/10.1109/SAAHPC.2011.12 
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226.https://doi.org/10.1109/ASAP.2011.6043273 
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Happe, M., Agne, A., &; Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60.https://doi.org/10.1109/ReConFig.2011.59 
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Kenter, T., Platzner, M., Plessl, C., &; Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180.https://doi.org/10.1145/1950413.1950448 
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Schumacher, T., Süß, T., Plessl, C., &; Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC).https://doi.org/10.1155/2011/760954 
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Grad, M., &; Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285.https://doi.org/10.1109/IPDPS.2011.153 
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Lübbers, E., Platzner, M., Plessl, C., Keller, A., &; Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.
LibreCat: /record/2223

Grad, M., &; Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72.https://doi.org/10.1109/ReConFig.2010.19 
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

Grad, M., &; Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.
LibreCat: /record/2224