Schumacher, T., Plessl, C., &; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126.https://doi.org/10.1016/j.micpro.2011.04.002 
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Happe, M., Hangmann, H., Agne, A., &; Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416745 
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Kenter, T., Plessl, C., &; Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416773 
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Happe, M., Agne, A., Plessl, C., &; Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.
LibreCat: /record/609

Barrio, P., Carreras, C., Sierra, R., Kenter, T., &; Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565.https://doi.org/10.1109/HPCSim.2012.6266973 
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Rüthing, C., Happe, M., Agne, A., &; Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562.https://doi.org/10.1109/FPL.2012.6339370 
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).
LibreCat: /record/2180

Grad, M., &; Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC).https://doi.org/10.1155/2012/418315 
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Kenter, T., Plessl, C., Platzner, M., &; Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
LibreCat: /record/2191

Plessl, C., &; Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui &; H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global.https://doi.org/10.4018/978-1-60960-086-0 
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Sekanina, L., Walker, J. A., Kaufmann, P., Plessl, C., &; Platzner, M. (2011). Evolution of Electronic Circuits. In Cartesian Genetic Programming (pp. 125–179). Springer Berlin Heidelberg.
LibreCat: /record/10737

Meyer, B., Plessl, C., &; Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63.https://doi.org/10.1109/SAAHPC.2011.12 
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226.https://doi.org/10.1109/ASAP.2011.6043273 
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Happe, M., Agne, A., &; Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60.https://doi.org/10.1109/ReConFig.2011.59 
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Kenter, T., Platzner, M., Plessl, C., &; Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180.https://doi.org/10.1145/1950413.1950448 
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Schumacher, T., Süß, T., Plessl, C., &; Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC).https://doi.org/10.1155/2011/760954 
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Grad, M., &; Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285.https://doi.org/10.1109/IPDPS.2011.153 
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Lübbers, E., Platzner, M., Plessl, C., Keller, A., &; Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.
LibreCat: /record/2223

Grad, M., &; Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72.https://doi.org/10.1109/ReConFig.2010.19 
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

Grad, M., &; Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.
LibreCat: /record/2224