Riebler, H., Vaz, G. F., Kenter, T., &; Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL. ACM Trans. Archit. Code Optim. (TACO), 16(2), 14:1–14:26.https://doi.org/10.1145/3319423 
LibreCat: /record/7689
DOI: 10.1145/3319423

Gorlani, P., Kenter, T., &; Plessl, C. (2019). OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs. In Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE.https://doi.org/10.1109/ICFPT47387.2019.00020 
LibreCat: /record/15478
DOI: 10.1109/ICFPT47387.2019.00020

Vaz, G. F. (2019). Using Just-in-Time Code Generation to Transparently Accelerate Applications in Heterogeneous Systems. Universität Paderborn.
LibreCat: /record/14849

Richters, D., Lass, M., Walther, A., Plessl, C., &; Kühne, T. (2019). A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics, 25(2), 564–585.https://doi.org/10.4208/cicp.OA-2018-0053 
LibreCat: /record/21
DOI: 10.4208/cicp.OA-2018-0053
arXiv: 1703.02456

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Lass, M., Kühne, T., &; Plessl, C. (2018). Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots. Embedded Systems Letters, 10(2), 33–36.https://doi.org/10.1109/LES.2017.2760923 
LibreCat: /record/20
DOI: 10.1109/LES.2017.2760923
arXiv: 1703.02283

Filmwala, T. (2018). Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate it on FPGA Platform. Universität Paderborn.
LibreCat: /record/5414

Gadewar, O. (2018). Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL. Universität Paderborn.
LibreCat: /record/5421

Mertens, J. C., Boschmann, A., Schmidt, M., &; Plessl, C. (2018). Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering, 21(4), 441–451.https://doi.org/10.1007/s12283-018-0291-0 
LibreCat: /record/6516
DOI: 10.1007/s12283-018-0291-0

Ramaswami, A. (2018). Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA. Universität Paderborn.
LibreCat: /record/5417

Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A., Hannig, F., Förstner, J., &; Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM).https://doi.org/10.1109/FCCM.2018.00037 
LibreCat: /record/1588
DOI: 10.1109/FCCM.2018.00037

Lass, M., Mohr, S., Wiebeler, H., Kühne, T., &; Plessl, C. (2018). A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. Proc. Platform for Advanced Scientific Computing (PASC) Conference. Platform for Advanced Scientific Computing Conference (PASC), Basel, Switzerland.https://doi.org/10.1145/3218176.3218231 
LibreCat: /record/1590
DOI: 10.1145/3218176.3218231
arXiv: 1710.10899

Riebler, H., Vaz, G. F., Kenter, T., &; Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP).https://doi.org/10.1145/3178487.3178534 
LibreCat: /record/1204
DOI: 10.1145/3178487.3178534

Riebler, H., Lass, M., Mittendorf, R., Löcke, T., &; Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23.https://doi.org/10.1145/3053687 
LibreCat: /record/18
DOI: 10.1145/3053687

Kenter, T., Förstner, J., &; Plessl, C. (2017). Flexible FPGA design for FDTD using OpenCL. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL).https://doi.org/10.23919/FPL.2017.8056844 
LibreCat: /record/1592
DOI: 10.23919/FPL.2017.8056844

Schumacher, J., Plessl, C., &; Vandelli, W. (2017). High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series, 898, Article 082003.https://doi.org/10.1088/1742-6596/898/8/082003 
LibreCat: /record/1589
DOI: 10.1088/1742-6596/898/8/082003

Lass, M., Leibenger, D., &; Sorge, C. (2016). Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension. In Proc. 41st Conference on Local Computer Networks (LCN). IEEE.https://doi.org/10.1109/lcn.2016.11 
LibreCat: /record/19
DOI: 10.1109/lcn.2016.11

Tölke, C. (2016). Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung. Universität Paderborn.
LibreCat: /record/5418

Wüllrich, G. (2016). Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment. Universität Paderborn.
LibreCat: /record/5420

Kenter, T. (2016). Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn.
LibreCat: /record/161

Agne, A., Platzner, M., Plessl, C., Happe, M., &; Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, &; D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Springer International Publishing.https://doi.org/10.1007/978-3-319-26408-0_13 
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat: /record/31

Kenter, T., &; Plessl, C. (2016). Microdisk Cavity FDTD Simulation on FPGA using OpenCL. Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC).
LibreCat: /record/24

Lass, M., Kühne, T., &; Plessl, C. (2016). Using Approximate Computing in Scientific Codes. Workshop on Approximate Computing (AC).
LibreCat: /record/25

Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., Santambrogio, M. D., &; Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 1–5.https://doi.org/10.1109/RTSI.2016.7740545 
LibreCat: /record/138
DOI: 10.1109/RTSI.2016.7740545

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111.https://doi.org/10.1016/j.compeleceng.2016.04.021 
LibreCat: /record/165
DOI: 10.1016/j.compeleceng.2016.04.021

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.
LibreCat: /record/168

Kenter, T., Vaz, G. F., Riebler, H., &; Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).
LibreCat: /record/171

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205 
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Lass, M. (2015). Localization and Analysis of Code Paths Suitable for Acceleration using Approximate Computing. Paderborn: Paderborn University.
LibreCat: /record/1794

Jenert, T., &; Brahm, T. (2015). How Do They Find Their Place? A Longitudinal Study of Management Students’ Attitudes and Motivations During Their First Year at Business School. Presented at the American Educational Research Association (AERA) Annual Meeting 2015, Chicago.
LibreCat: /record/4465

Funke, L. (2015). An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn.
LibreCat: /record/5413

Löcke, T. (2015). Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn.
LibreCat: /record/5416

Wallaschek, F. (2015). Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn.
LibreCat: /record/5419

Beisel, T. (2015). Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10624

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 
LibreCat: /record/296
DOI: 10.1155/2015/859425

Damschen, M., &; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).
LibreCat: /record/303
arXiv: 1412.3906

Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann-Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., P. Schreuder, F., Vandelli, W., Vermeulen, J., &; Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. Proc. Int. Conf. on Distributed Event-Based Systems (DEBS).https://doi.org/10.1145/2675743.2771824 
LibreCat: /record/1773
DOI: 10.1145/2675743.2771824

Plessl, C., Platzner, M., &; Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, 5, 396–399.https://doi.org/10.1007/s00287-015-0911-z 
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

Damschen, M., Riebler, H., Vaz, G. F., &; Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083.https://doi.org/10.7873/DATE.2015.1124 
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., Schreuder, F., Schumacher, J., Vandelli, W., Vermeulen, J., &; Zhang, J. (2015). FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades. Journal of Physics: Conference Series, 664, Article 082050.https://doi.org/10.1088/1742-6596/664/8/082050 
LibreCat: /record/1775
DOI: 10.1088/1742-6596/664/8/082050

Platzner, M., &; Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, &; T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Wilhelm Fink.
LibreCat: /record/335

Kenter, T., Vaz, G. F., &; Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405, 144–155.https://doi.org/10.1007/978-3-319-05960-0_13 
LibreCat: /record/388
DOI: 10.1007/978-3-319-05960-0_13

Agne, A., Hangmann, H., Happe, M., Platzner, M., &; Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919.https://doi.org/10.1016/j.micpro.2013.12.001 
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Riebler, H., Kenter, T., Plessl, C., &; Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229.https://doi.org/10.1109/FCCM.2014.67 
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.https://doi.org/10.1145/2617596 
LibreCat: /record/365
DOI: 10.1145/2617596

Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &; Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71.https://doi.org/10.1109/MM.2013.110 
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., &; Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149.https://doi.org/10.1109/ISPA.2014.27 
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2014.7032509 
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509