A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices
M. Lass, S. Mohr, H. Wiebeler, T. Kühne, C. Plessl, in: Proc. Platform for Advanced Scientific Computing (PASC) Conference, ACM, New York, NY, USA, 2018.
LibreCat: /record/1590
DOI: 10.1145/3218176.3218231
arXiv: 1710.10899

Automated Code Acceleration Targeting Heterogeneous OpenCL Devices
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, in: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018.
LibreCat: /record/1204
DOI: 10.1145/3178487.3178534

Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.
LibreCat: /record/18
DOI: 10.1145/3053687

Flexible FPGA design for FDTD using OpenCL
T. Kenter, J. Förstner, C. Plessl, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017.
LibreCat: /record/1592
DOI: 10.23919/FPL.2017.8056844

High-Throughput and Low-Latency Network Communication with NetIO
J. Schumacher, C. Plessl, W. Vandelli, Journal of Physics: Conference Series 898 (2017).
LibreCat: /record/1589
DOI: 10.1088/1742-6596/898/8/082003

Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension
M. Lass, D. Leibenger, C. Sorge, in: Proc. 41st Conference on Local Computer Networks (LCN), IEEE, 2016.
LibreCat: /record/19
DOI: 10.1109/lcn.2016.11

Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung
C. Tölke, Sicherheit von Hybriden FPGA-Systemen in Der Industriellen Automatisierungstechnik -- Anforderungen Und Umsetzung, Universität Paderborn, 2016.
LibreCat: /record/5418

Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment
G. Wüllrich, Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment, Universität Paderborn, 2016.
LibreCat: /record/5420

Reconfigurable Accelerators in the World of General-Purpose Computing
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing, Universität Paderborn, 2016.
LibreCat: /record/161

ReconOS
A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: D. Koch, F. Hannig, D. Ziener (Eds.), FPGAs for Software Programmers, Springer International Publishing, Cham, 2016, pp. 227–244.
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, C. Bolchini, in: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
LibreCat: /record/31

Microdisk Cavity FDTD Simulation on FPGA using OpenCL
T. Kenter, C. Plessl, in: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (RC), 2016.
LibreCat: /record/24

Using Approximate Computing in Scientific Codes
M. Lass, T. Kühne, C. Plessl, in: Workshop on Approximate Computing (AC), 2016.
LibreCat: /record/25

Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, E. Del Sozzo, M.D. Santambrogio, C. Bolchini, in: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5.
LibreCat: /record/138
DOI: 10.1109/RTSI.2016.7740545

Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, Computers and Electrical Engineering 55 (2016) 91–111.
LibreCat: /record/165
DOI: 10.1016/j.compeleceng.2016.04.021

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
LibreCat: /record/168

Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract)
T. Kenter, G.F. Vaz, H. Riebler, C. Plessl, in: Workshop on Reconfigurable Computing (WRC), 2016.
LibreCat: /record/171

Self-Aware and Self-Expressive Systems – Guest Editor's Introduction
J. Torresen, C. Plessl, X. Yao, IEEE Computer 48 (2015) 18–20.
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Localization and Analysis of Code Paths Suitable for Acceleration using Approximate Computing
M. Lass, Localization and Analysis of Code Paths Suitable for Acceleration Using Approximate Computing, Paderborn University, Paderborn, 2015.
LibreCat: /record/1794

How Do They Find Their Place? A Longitudinal Study of Management Students' Attitudes and Motivations During Their First Year at Business School
T. Jenert, T. Brahm, in: 2015.
LibreCat: /record/4465

An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures
L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications Using FPGA Overlay Architectures, Universität Paderborn, 2015.
LibreCat: /record/5413

Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems
T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems, Universität Paderborn, 2015.
LibreCat: /record/5416

Accelerating Programmable Logic Controllers with the use of FPGAs
F. Wallaschek, Accelerating Programmable Logic Controllers with the Use of FPGAs, Universität Paderborn, 2015.
LibreCat: /record/5419

Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.
LibreCat: /record/10624

Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study
T. Kenter, H. Schmitz, C. Plessl, International Journal of Reconfigurable Computing (IJRC) 2015 (2015).
LibreCat: /record/296
DOI: 10.1155/2015/859425

Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat: /record/303
arXiv: 1412.3906

Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm
J. Schumacher, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann-Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. P. Schreuder, W. Vandelli, J. Vermeulen, J. Zhang, in: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015.
LibreCat: /record/1773
DOI: 10.1145/2675743.2771824

Aktuelles Schlagwort: Approximate Computing
C. Plessl, M. Platzner, P.J. Schreier, Informatik Spektrum (2015) 396–399.
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

Transparent offloading of computational hotspots from binary code to Xeon Phi
M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades
J. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. Schreuder, J. Schumacher, W. Vandelli, J. Vermeulen, J. Zhang, Journal of Physics: Conference Series 664 (2015).
LibreCat: /record/1775
DOI: 10.1088/1742-6596/664/8/082050

Verschiebungen an der Grenze zwischen Hardware und Software
M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn, 2014, pp. 123–144.
LibreCat: /record/335

Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer
T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.
LibreCat: /record/388
DOI: 10.1007/978-3-319-05960-0_13

Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Reconstructing AES Key Schedules from Decayed Memory with FPGAs
H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
LibreCat: /record/365
DOI: 10.1145/2617596

ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach
G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

Deferring Accelerator Offloading Decisions to Application Runtime
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509

Kernel-Centric Acceleration of High Accuracy Stereo-Matching
T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat: /record/406
DOI: 10.1109/ReConFig.2014.7032535

SAVE: Towards efficient resource management in heterogeneous system architectures
G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014.
LibreCat: /record/1780
DOI: 10.1007/978-3-319-05960-0_38

Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers
H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News 41 (2014) 65–70.
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs, Universität Paderborn, 2013.
LibreCat: /record/521

FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

A Data Driven Science Gateway for Computational Workflows
R. Grunzke, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, S. Gesing, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, M. Kruse, R. Müller-Pfefferkorn, P. Schäfer, B. Schuller, T. Steinke, A. Zink, in: Proc. UNICORE Summit, 2012.
LibreCat: /record/2107

Programming models for reconfigurable heterogeneous multi-cores
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012.
LibreCat: /record/587

Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002